Optimization of Continuous-Time Pipeline ADC Architectures for Wideband Medium-Resolution Applications

Continuous-time pipeline (CT-Pipeline) ADCs are an emerging analog-to-digital medium-resolution converter architecture. Recently demonstrated examples prove that they are capable of achieving larger bandwidths than those of state-of-the-art continuous-time ΣΔ ADCs, which until now were the preferred...

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Detalles Bibliográficos
Autor: Ramírez Lechuga, Iván
Tipo de recurso: tesis de maestría
Fecha de publicación:2025
País:España
Institución:Universitat Politècnica de Catalunya (UPC)
Repositorio:UPCommons. Portal del coneixement obert de la UPC
Idioma:inglés
OAI Identifier:oai:upcommons.upc.edu:2117/429986
Acceso en línea:https://hdl.handle.net/2117/429986
Access Level:acceso abierto
Palabra clave:Analog-to-digital converters
Integrated circuits--Computer-aided design
ADC
Pipeline
Convertidors analògic/digitals
Circuits integrats--Disseny assistit per ordinador
Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats
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spelling Optimization of Continuous-Time Pipeline ADC Architectures for Wideband Medium-Resolution ApplicationsRamírez Lechuga, IvánAnalog-to-digital convertersIntegrated circuits--Computer-aided designADCPipelineConvertidors analògic/digitalsCircuits integrats--Disseny assistit per ordinadorÀrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integratsContinuous-time pipeline (CT-Pipeline) ADCs are an emerging analog-to-digital medium-resolution converter architecture. Recently demonstrated examples prove that they are capable of achieving larger bandwidths than those of state-of-the-art continuous-time ΣΔ ADCs, which until now were the preferred wideband mediumresolution ADC choice. In this work, this type of converter is demonstrated through a MATLAB Simulink model. Throughout these pages, a detailed analysis and explanation of this topology is provided, while proposing solutions to some of the recurring design challenges. With regard to the implementation, the use of power-efficient VCO quantizers has been evaluated. A comparison is also conducted between two alternatives for the digital reconstruction filter. In addition, the most common non-idealities and their effects are also introduced and validated by simulation. The developed model of a 4-stage continuous-time pipeline ADC achieves a SNDR of 80 dB over a 400-MHz bandwidth. It is intended to serve as an initial step towards the implementation of a CT-Pipeline that achieves an SNDR of 70 dB.Universitat Politècnica de CatalunyaAragonès Cervera, XavierGielen, Georges20252025-02-1120252025-05-21master thesishttp://purl.org/coar/resource_type/c_bdccNAhttp://purl.org/coar/version/c_be7fb7dd8ff6fe43info:eu-repo/semantics/masterThesisapplication/pdfhttps://hdl.handle.net/2117/429986reponame:UPCommons. Portal del coneixement obert de la UPCinstname:Universitat Politècnica de Catalunya (UPC)Inglésengopen accesshttp://purl.org/coar/access_right/c_abf2info:eu-repo/semantics/openAccessoai:upcommons.upc.edu:2117/4299862026-05-27T15:37:01Z
dc.title.none.fl_str_mv Optimization of Continuous-Time Pipeline ADC Architectures for Wideband Medium-Resolution Applications
title Optimization of Continuous-Time Pipeline ADC Architectures for Wideband Medium-Resolution Applications
spellingShingle Optimization of Continuous-Time Pipeline ADC Architectures for Wideband Medium-Resolution Applications
Ramírez Lechuga, Iván
Analog-to-digital converters
Integrated circuits--Computer-aided design
ADC
Pipeline
Convertidors analògic/digitals
Circuits integrats--Disseny assistit per ordinador
Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats
title_short Optimization of Continuous-Time Pipeline ADC Architectures for Wideband Medium-Resolution Applications
title_full Optimization of Continuous-Time Pipeline ADC Architectures for Wideband Medium-Resolution Applications
title_fullStr Optimization of Continuous-Time Pipeline ADC Architectures for Wideband Medium-Resolution Applications
title_full_unstemmed Optimization of Continuous-Time Pipeline ADC Architectures for Wideband Medium-Resolution Applications
title_sort Optimization of Continuous-Time Pipeline ADC Architectures for Wideband Medium-Resolution Applications
dc.creator.none.fl_str_mv Ramírez Lechuga, Iván
author Ramírez Lechuga, Iván
author_facet Ramírez Lechuga, Iván
author_role author
dc.contributor.none.fl_str_mv Aragonès Cervera, Xavier
Gielen, Georges
dc.subject.none.fl_str_mv Analog-to-digital converters
Integrated circuits--Computer-aided design
ADC
Pipeline
Convertidors analògic/digitals
Circuits integrats--Disseny assistit per ordinador
Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats
topic Analog-to-digital converters
Integrated circuits--Computer-aided design
ADC
Pipeline
Convertidors analògic/digitals
Circuits integrats--Disseny assistit per ordinador
Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats
description Continuous-time pipeline (CT-Pipeline) ADCs are an emerging analog-to-digital medium-resolution converter architecture. Recently demonstrated examples prove that they are capable of achieving larger bandwidths than those of state-of-the-art continuous-time ΣΔ ADCs, which until now were the preferred wideband mediumresolution ADC choice. In this work, this type of converter is demonstrated through a MATLAB Simulink model. Throughout these pages, a detailed analysis and explanation of this topology is provided, while proposing solutions to some of the recurring design challenges. With regard to the implementation, the use of power-efficient VCO quantizers has been evaluated. A comparison is also conducted between two alternatives for the digital reconstruction filter. In addition, the most common non-idealities and their effects are also introduced and validated by simulation. The developed model of a 4-stage continuous-time pipeline ADC achieves a SNDR of 80 dB over a 400-MHz bandwidth. It is intended to serve as an initial step towards the implementation of a CT-Pipeline that achieves an SNDR of 70 dB.
publishDate 2025
dc.date.none.fl_str_mv 2025
2025-02-11
2025
2025-05-21
dc.type.none.fl_str_mv master thesis
http://purl.org/coar/resource_type/c_bdcc
NA
http://purl.org/coar/version/c_be7fb7dd8ff6fe43
dc.type.openaire.fl_str_mv info:eu-repo/semantics/masterThesis
format masterThesis
dc.identifier.none.fl_str_mv https://hdl.handle.net/2117/429986
url https://hdl.handle.net/2117/429986
dc.language.none.fl_str_mv Inglés
eng
language_invalid_str_mv Inglés
language eng
dc.rights.none.fl_str_mv open access
http://purl.org/coar/access_right/c_abf2
dc.rights.openaire.fl_str_mv info:eu-repo/semantics/openAccess
rights_invalid_str_mv open access
http://purl.org/coar/access_right/c_abf2
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
dc.publisher.none.fl_str_mv Universitat Politècnica de Catalunya
publisher.none.fl_str_mv Universitat Politècnica de Catalunya
dc.source.none.fl_str_mv reponame:UPCommons. Portal del coneixement obert de la UPC
instname:Universitat Politècnica de Catalunya (UPC)
instname_str Universitat Politècnica de Catalunya (UPC)
reponame_str UPCommons. Portal del coneixement obert de la UPC
collection UPCommons. Portal del coneixement obert de la UPC
repository.name.fl_str_mv
repository.mail.fl_str_mv
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score 15,811543

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