Modeling of the degradation of CMOS inverters under pulsed stress conditions from ‘on-the-fly’ measurements
©2021 Elsevier. This manuscript version is made available under the CC-BY-NC-ND 4.0 license http://creativecommons.org/licenses/by-nc-nd/4.0/
| Autores: | , , , , , , , |
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| Tipo de recurso: | artículo |
| Fecha de publicación: | 2021 |
| País: | España |
| Institución: | Universitat Politècnica de Catalunya (UPC) |
| Repositorio: | UPCommons. Portal del coneixement obert de la UPC |
| Idioma: | inglés |
| OAI Identifier: | oai:upcommons.upc.edu:2117/366511 |
| Acceso en línea: | https://hdl.handle.net/2117/366511 https://dx.doi.org/10.1016/j.sse.2021.108094 |
| Access Level: | acceso abierto |
| Palabra clave: | Electric inverters Metal oxide semiconductors, Complementary CMOS technology On-the-fly stress characterization Circuit performance degradation Transistor aging CMOS inverters Measurement technique Analytical modelling Convertidors continu-altern Metall-òxid-semiconductors complementaris Àrees temàtiques de la UPC::Enginyeria electrònica::Electrònica de potència::Convertidors de corrent elèctric |
| Sumario: | ©2021 Elsevier. This manuscript version is made available under the CC-BY-NC-ND 4.0 license http://creativecommons.org/licenses/by-nc-nd/4.0/ |
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