Cryogenic performance of field-effect transistors and amplifiers based on selective area grown InAs nanowires
Indium-arsenide nanowire field-effect transistors (NWFETs) are promising platforms for high-speed, low-power nanoelectronics operating at cryogenic conditions, relevant for quantum information processing. We use selective area growth of nanowires to realize scalable and planar nanowire device geomet...
| Autores: | , , , , , , , , |
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| Tipo de documento: | artigo |
| Estado: | Versão publicada |
| Data de publicação: | 2025 |
| País: | España |
| Recursos: | Consejo Superior de Investigaciones Científicas (CSIC) |
| Repositório: | DIGITAL.CSIC. Repositorio Institucional del CSIC |
| OAI Identifier: | oai:digital.csic.es:10261/410225 |
| Acesso em linha: | http://hdl.handle.net/10261/410225 https://api.elsevier.com/content/abstract/scopus_id/105021342219 |
| Access Level: | Acesso embargado |
| Palavra-chave: | Semiconductors Electrical properties and parameters Field effect transistors Amplifiers Multiplexers Semiconductor device characterization Nanoelectronics Semiconductor growth Nanowires Quantum information |
| Resumo: | Indium-arsenide nanowire field-effect transistors (NWFETs) are promising platforms for high-speed, low-power nanoelectronics operating at cryogenic conditions, relevant for quantum information processing. We use selective area growth of nanowires to realize scalable and planar nanowire device geometries that are compatible with standard semiconductor processing techniques. NWFETs are fabricated, and their low temperature characteristics, including I ON / I OFF ratios, threshold voltages, sub-threshold slope, interfacial trap density, hysteresis, and mobility, are characterized. The NWFETs operate effectively in integrated circuitry relying on saturation-mode operation. In sub-threshold applications such as amplifiers, we find bandwidths exceeding our cryostat wiring, but the gate hysteresis presents challenges for precise tuning of the amplifier operating point. We discuss the role of crystal imperfections and fabrication processes on the transistor characteristics and propose strategies for further improvements. |
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