Aging in CMOS RF linear power amplifiers

An extensive experimental analysis of the HCI and BTI aging effects on RF linear power amplifiers (PA) is presented in this paper. Two different 2.45 GHz PA topologies have been implemented in a CMOS 65 nm technology, one based on a classical common-source (CS) and choke inductor, another one based...

Descripción completa

Detalles Bibliográficos
Autores: Nafria, Montserrat|||0000-0002-9549-2890, Martin Martinez, Javier|||0000-0001-5938-5898, Crespo Yepes, Albert|||0000-0003-4618-651X, Rodríguez Martínez, Rosana|||0000-0002-4565-6703, Barajas, Enrique|||0000-0002-2072-2268, Mateo, Diego|||0000-0001-5996-9092, Aragones, Xavier|||0000-0003-1352-8675
Tipo de recurso: artículo
Fecha de publicación:2021
País:España
Institución:Universitat Autònoma de Barcelona
Repositorio:Dipòsit Digital de Documents de la UAB
Idioma:inglés
OAI Identifier:oai:ddd.uab.cat:248832
Acceso en línea:https://ddd.uab.cat/record/248832
https://dx.doi.org/urn:doi:10.1109/tmtt.2020.3041282
Access Level:acceso abierto
Palabra clave:Radio frequency
Stress
Aging
Transistors
Degradation
Integrated circuit modeling
Human computer interaction
Descripción
Sumario:An extensive experimental analysis of the HCI and BTI aging effects on RF linear power amplifiers (PA) is presented in this paper. Two different 2.45 GHz PA topologies have been implemented in a CMOS 65 nm technology, one based on a classical common-source (CS) and choke inductor, another one based on a complementary current-reuse (CR) circuit, both of them producing similar gain and output 1-dB compression point (P-1dB). These circuits have been stressed to produce accelerated aging degradation, by applying increasing supply (VDD) voltages, or increasing RF input powers (PIN). The degradation on the transistor parameters (threshold voltage and mobility), DC bias point (IDC current) and RF performance (gain, matching, compression point) have been simultaneously measured. This has allowed to observe how the reduced transistor degradation in CR PA results in a higher robustness in its RF parameters, compared to CS PA circuit. The equivalent RMS voltages have been proposed as an observable metric to assess the combined DC+RF stress in a PA circuit. This has been applied to a semi-analytical model, thus providing comprehension of the link between the conditions under which a circuit is operated, the degradation of the transistor parameters, and the effects on the DC current and RF performance.