Individual flip-flops with gated clocks for low power datapaths

Energy consumption has become one of the important factors in digital systems, because of the requirement to dissipate this energy in high-density circuits and to extend the battery life in portable systems such as devices with wireless communication capabilities. Flip-flops are one of the most ener...

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Detalles Bibliográficos
Autores: Lang, Tomás, Cortadella, Jordi|||0000-0001-8114-250X, Musoll Cinca, Enric
Tipo de recurso: artículo
Fecha de publicación:1997
País:España
Institución:Universitat Politècnica de Catalunya (UPC)
Repositorio:UPCommons. Portal del coneixement obert de la UPC
Idioma:inglés
OAI Identifier:oai:upcommons.upc.edu:2117/129522
Acceso en línea:https://hdl.handle.net/2117/129522
https://dx.doi.org/10.1109/82.592586
Access Level:acceso abierto
Palabra clave:Logic circuits
Microprocessors -- Energy consumption
Flip-flops
Clocks
Energy consumption
CMOS technology
Digital systems
Batteries
Wireless communication
Power system modeling
Circuit simulation
Registers
Circuits lògics
Microprocessadors -- Consum d'energia
Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats
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repository_id_str
spelling Individual flip-flops with gated clocks for low power datapathsLang, TomásCortadella, Jordi|||0000-0001-8114-250XMusoll Cinca, EnricLogic circuitsMicroprocessors -- Energy consumptionFlip-flopsClocksEnergy consumptionCMOS technologyDigital systemsBatteriesWireless communicationPower system modelingCircuit simulationRegistersCircuits lògicsMicroprocessadors -- Consum d'energiaÀrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integratsEnergy consumption has become one of the important factors in digital systems, because of the requirement to dissipate this energy in high-density circuits and to extend the battery life in portable systems such as devices with wireless communication capabilities. Flip-flops are one of the most energy-consuming components of digital circuits. This paper presents techniques to reduce energy consumption by individually deactivating the clock when flip-flops do not have to change their value. Flip-flop structures are proposed and selection criteria given to obtain minimum energy consumption. The structures have been evaluated using energy models and validated by switch-level simulations. For the applications considered, significant energy reductions are achieved.Peer ReviewedInstitute of Electrical and Electronics Engineers (IEEE)19971997-06-0120192019-02-21journal articlehttp://purl.org/coar/resource_type/c_6501VoRhttp://purl.org/coar/version/c_970fb48d4fbd8a85info:eu-repo/semantics/articleapplication/pdfhttps://hdl.handle.net/2117/129522https://dx.doi.org/10.1109/82.592586reponame:UPCommons. Portal del coneixement obert de la UPCinstname:Universitat Politècnica de Catalunya (UPC)Inglésengopen accesshttp://purl.org/coar/access_right/c_abf2info:eu-repo/semantics/openAccessoai:upcommons.upc.edu:2117/1295222026-05-27T15:37:01Z
dc.title.none.fl_str_mv Individual flip-flops with gated clocks for low power datapaths
title Individual flip-flops with gated clocks for low power datapaths
spellingShingle Individual flip-flops with gated clocks for low power datapaths
Lang, Tomás
Logic circuits
Microprocessors -- Energy consumption
Flip-flops
Clocks
Energy consumption
CMOS technology
Digital systems
Batteries
Wireless communication
Power system modeling
Circuit simulation
Registers
Circuits lògics
Microprocessadors -- Consum d'energia
Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats
title_short Individual flip-flops with gated clocks for low power datapaths
title_full Individual flip-flops with gated clocks for low power datapaths
title_fullStr Individual flip-flops with gated clocks for low power datapaths
title_full_unstemmed Individual flip-flops with gated clocks for low power datapaths
title_sort Individual flip-flops with gated clocks for low power datapaths
dc.creator.none.fl_str_mv Lang, Tomás
Cortadella, Jordi|||0000-0001-8114-250X
Musoll Cinca, Enric
author Lang, Tomás
author_facet Lang, Tomás
Cortadella, Jordi|||0000-0001-8114-250X
Musoll Cinca, Enric
author_role author
author2 Cortadella, Jordi|||0000-0001-8114-250X
Musoll Cinca, Enric
author2_role author
author
dc.subject.none.fl_str_mv Logic circuits
Microprocessors -- Energy consumption
Flip-flops
Clocks
Energy consumption
CMOS technology
Digital systems
Batteries
Wireless communication
Power system modeling
Circuit simulation
Registers
Circuits lògics
Microprocessadors -- Consum d'energia
Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats
topic Logic circuits
Microprocessors -- Energy consumption
Flip-flops
Clocks
Energy consumption
CMOS technology
Digital systems
Batteries
Wireless communication
Power system modeling
Circuit simulation
Registers
Circuits lògics
Microprocessadors -- Consum d'energia
Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats
description Energy consumption has become one of the important factors in digital systems, because of the requirement to dissipate this energy in high-density circuits and to extend the battery life in portable systems such as devices with wireless communication capabilities. Flip-flops are one of the most energy-consuming components of digital circuits. This paper presents techniques to reduce energy consumption by individually deactivating the clock when flip-flops do not have to change their value. Flip-flop structures are proposed and selection criteria given to obtain minimum energy consumption. The structures have been evaluated using energy models and validated by switch-level simulations. For the applications considered, significant energy reductions are achieved.
publishDate 1997
dc.date.none.fl_str_mv 1997
1997-06-01
2019
2019-02-21
dc.type.none.fl_str_mv journal article
http://purl.org/coar/resource_type/c_6501
VoR
http://purl.org/coar/version/c_970fb48d4fbd8a85
dc.type.openaire.fl_str_mv info:eu-repo/semantics/article
format article
dc.identifier.none.fl_str_mv https://hdl.handle.net/2117/129522
https://dx.doi.org/10.1109/82.592586
url https://hdl.handle.net/2117/129522
https://dx.doi.org/10.1109/82.592586
dc.language.none.fl_str_mv Inglés
eng
language_invalid_str_mv Inglés
language eng
dc.rights.none.fl_str_mv open access
http://purl.org/coar/access_right/c_abf2
dc.rights.openaire.fl_str_mv info:eu-repo/semantics/openAccess
rights_invalid_str_mv open access
http://purl.org/coar/access_right/c_abf2
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
dc.publisher.none.fl_str_mv Institute of Electrical and Electronics Engineers (IEEE)
publisher.none.fl_str_mv Institute of Electrical and Electronics Engineers (IEEE)
dc.source.none.fl_str_mv reponame:UPCommons. Portal del coneixement obert de la UPC
instname:Universitat Politècnica de Catalunya (UPC)
instname_str Universitat Politècnica de Catalunya (UPC)
reponame_str UPCommons. Portal del coneixement obert de la UPC
collection UPCommons. Portal del coneixement obert de la UPC
repository.name.fl_str_mv
repository.mail.fl_str_mv
_version_ 1869408921745096705
score 15.300719

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