Gate-level hardware countermeasure comparison against power analysis attacks
This article belongs to the Special Issue Side Channel Attacks in Embedded Systems.
| Autores: | , , , , |
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| Tipo de recurso: | artículo |
| Estado: | Versión publicada |
| Fecha de publicación: | 2022 |
| País: | España |
| Institución: | Consejo Superior de Investigaciones Científicas (CSIC) |
| Repositorio: | DIGITAL.CSIC. Repositorio Institucional del CSIC |
| OAI Identifier: | oai:digital.csic.es:10261/336912 |
| Acceso en línea: | http://hdl.handle.net/10261/336912 |
| Access Level: | acceso abierto |
| Palabra clave: | Hardware countermeasures Internet of Things (IoT) Gate level Logic design VLSI design of cryptographic circuits Information security Side-channel attacks (SCAs) |
| Sumario: | This article belongs to the Special Issue Side Channel Attacks in Embedded Systems. |
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