Scalability and Virtualization enhancement in Spiking Neural Hardware based on PSOC

This thesis work is focussed on the scalability and virtualization enhancement of HEENS architecture, which is a spiking neural hardware emulator. All blocks are described in VHDL, simulated to check their behaviour and finally the whole system is synthesized and implemented on a PSOC, in order to v...

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Detalhes bibliográficos
Autor: Gattuso, Roberto
Formato: tesis de maestría
Fecha de publicación:2019
País:España
Recursos:Universitat Politècnica de Catalunya (UPC)
Repositorio:UPCommons. Portal del coneixement obert de la UPC
Idioma:inglés
OAI Identifier:oai:upcommons.upc.edu:2117/169144
Acesso em linha:https://hdl.handle.net/2117/169144
Access Level:acceso abierto
Palavra-chave:Neural networks (Computer science)
Detectors
HEENS
SNN
Spiking Neural Network
Virtualization
Xarxes neuronals (Informàtica)
Àrees temàtiques de la UPC::Enginyeria electrònica
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spelling Scalability and Virtualization enhancement in Spiking Neural Hardware based on PSOCGattuso, RobertoNeural networks (Computer science)DetectorsHEENSSNNSpiking Neural NetworkVirtualizationXarxes neuronals (Informàtica)DetectorsÀrees temàtiques de la UPC::Enginyeria electrònicaThis thesis work is focussed on the scalability and virtualization enhancement of HEENS architecture, which is a spiking neural hardware emulator. All blocks are described in VHDL, simulated to check their behaviour and finally the whole system is synthesized and implemented on a PSOC, in order to verify time constraints and area occupied. In particular, all the improvements made concern the processing element array, which represents spiking neurons that have to be emulated. Finally the architecture has a new spike distribution structure, making the system more scalable, and virtualization is introduced, in order to extend the array without requiring more resources, thus saving space on the board.Universitat Politècnica de CatalunyaZapata Rodríguez, Mireya PatriciaMadrenas Boadas, Jordi20192019-07-0120192019-10-03master thesishttp://purl.org/coar/resource_type/c_bdccNAhttp://purl.org/coar/version/c_be7fb7dd8ff6fe43info:eu-repo/semantics/masterThesisapplication/pdfhttps://hdl.handle.net/2117/169144reponame:UPCommons. Portal del coneixement obert de la UPCinstname:Universitat Politècnica de Catalunya (UPC)Inglésengopen accesshttp://purl.org/coar/access_right/c_abf2info:eu-repo/semantics/openAccessoai:upcommons.upc.edu:2117/1691442026-05-27T15:37:01Z
dc.title.none.fl_str_mv Scalability and Virtualization enhancement in Spiking Neural Hardware based on PSOC
title Scalability and Virtualization enhancement in Spiking Neural Hardware based on PSOC
spellingShingle Scalability and Virtualization enhancement in Spiking Neural Hardware based on PSOC
Gattuso, Roberto
Neural networks (Computer science)
Detectors
HEENS
SNN
Spiking Neural Network
Virtualization
Xarxes neuronals (Informàtica)
Detectors
Àrees temàtiques de la UPC::Enginyeria electrònica
title_short Scalability and Virtualization enhancement in Spiking Neural Hardware based on PSOC
title_full Scalability and Virtualization enhancement in Spiking Neural Hardware based on PSOC
title_fullStr Scalability and Virtualization enhancement in Spiking Neural Hardware based on PSOC
title_full_unstemmed Scalability and Virtualization enhancement in Spiking Neural Hardware based on PSOC
title_sort Scalability and Virtualization enhancement in Spiking Neural Hardware based on PSOC
dc.creator.none.fl_str_mv Gattuso, Roberto
author Gattuso, Roberto
author_facet Gattuso, Roberto
author_role author
dc.contributor.none.fl_str_mv Zapata Rodríguez, Mireya Patricia
Madrenas Boadas, Jordi
dc.subject.none.fl_str_mv Neural networks (Computer science)
Detectors
HEENS
SNN
Spiking Neural Network
Virtualization
Xarxes neuronals (Informàtica)
Detectors
Àrees temàtiques de la UPC::Enginyeria electrònica
topic Neural networks (Computer science)
Detectors
HEENS
SNN
Spiking Neural Network
Virtualization
Xarxes neuronals (Informàtica)
Detectors
Àrees temàtiques de la UPC::Enginyeria electrònica
description This thesis work is focussed on the scalability and virtualization enhancement of HEENS architecture, which is a spiking neural hardware emulator. All blocks are described in VHDL, simulated to check their behaviour and finally the whole system is synthesized and implemented on a PSOC, in order to verify time constraints and area occupied. In particular, all the improvements made concern the processing element array, which represents spiking neurons that have to be emulated. Finally the architecture has a new spike distribution structure, making the system more scalable, and virtualization is introduced, in order to extend the array without requiring more resources, thus saving space on the board.
publishDate 2019
dc.date.none.fl_str_mv 2019
2019-07-01
2019
2019-10-03
dc.type.none.fl_str_mv master thesis
http://purl.org/coar/resource_type/c_bdcc
NA
http://purl.org/coar/version/c_be7fb7dd8ff6fe43
dc.type.openaire.fl_str_mv info:eu-repo/semantics/masterThesis
format masterThesis
dc.identifier.none.fl_str_mv https://hdl.handle.net/2117/169144
url https://hdl.handle.net/2117/169144
dc.language.none.fl_str_mv Inglés
eng
language_invalid_str_mv Inglés
language eng
dc.rights.none.fl_str_mv open access
http://purl.org/coar/access_right/c_abf2
dc.rights.openaire.fl_str_mv info:eu-repo/semantics/openAccess
rights_invalid_str_mv open access
http://purl.org/coar/access_right/c_abf2
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
dc.publisher.none.fl_str_mv Universitat Politècnica de Catalunya
publisher.none.fl_str_mv Universitat Politècnica de Catalunya
dc.source.none.fl_str_mv reponame:UPCommons. Portal del coneixement obert de la UPC
instname:Universitat Politècnica de Catalunya (UPC)
instname_str Universitat Politècnica de Catalunya (UPC)
reponame_str UPCommons. Portal del coneixement obert de la UPC
collection UPCommons. Portal del coneixement obert de la UPC
repository.name.fl_str_mv
repository.mail.fl_str_mv
_version_ 1869412840891219969
score 15.301603

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