Experimental verification of memristor-based material implication NAND operation

Memristors are being considered as promising devices for highly dense memory systems as well as the potential basis of new computational paradigms. In this scenario, and in relation with data processing, one of the more specific and differential logic functions is the material implication logic also...

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Detalhes bibliográficos
Autores: Maestro Izquierdo, Marcos|||0000-0002-8940-9050, Martin Martinez, Javier|||0000-0001-5938-5898, Crespo Yepes, Albert|||0000-0003-4618-651X, Escudero, Manel, Rodríguez Martínez, Rosana|||0000-0002-4565-6703, Nafria, Montserrat|||0000-0002-9549-2890, Aymerich Humet, Xavier|||0000-0002-5874-6257, Rubio, Antonio|||0000-0003-1625-1472
Formato: artículo
Fecha de publicación:2019
País:España
Recursos:Universitat Autònoma de Barcelona
Repositorio:Dipòsit Digital de Documents de la UAB
Idioma:inglés
OAI Identifier:oai:ddd.uab.cat:249152
Acesso em linha:https://ddd.uab.cat/record/249152
https://dx.doi.org/urn:doi:10.1109/TETC.2017.2760929
Access Level:acceso abierto
Palavra-chave:IMPLY function
Material implication
Memristive circuits
Memristors
NAND gate implementation
Resistive switching
Descrição
Resumo:Memristors are being considered as promising devices for highly dense memory systems as well as the potential basis of new computational paradigms. In this scenario, and in relation with data processing, one of the more specific and differential logic functions is the material implication logic also named as IMPLY logic. Many papers have been published in this framework but few of them are related with experimental works using real memristor devices. In the paper authors show the verification of the IMPLY function by using Ni/HfO2/Si manufactured devices and laboratory measurements. The proper behavior of the IMPLY structure (2 memristors) has been shown. The paper also verifies the proper operation of a two-step IMPLY-based NAND gate implementation, showing the electrical behavior of the circuit in a cycling operation. A new procedure to implement a NAND gate that requires only one step is experimentally shown as well.