Enabling RISC-V SoC with high-performance storage capabilities
This thesis focuses on enabling high performance storage capabilities in a RISC-V SoC through the integration and validation of an open source controller. Communication tests were carried out using SD cards on FPGA platforms, both in standalone environments and within the full system.
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| Format: | master thesis |
| Publication Date: | 2025 |
| Country: | España |
| Institution: | Universitat Politècnica de Catalunya (UPC) |
| Repository: | UPCommons. Portal del coneixement obert de la UPC |
| Language: | English |
| OAI Identifier: | oai:upcommons.upc.edu:2117/442707 |
| Online Access: | https://hdl.handle.net/2117/442707 |
| Access Level: | Open access |
| Keyword: | High performance computing RISC microprocessors Digital electronics Càlcul intensiu (Informàtica) Microprocessadors RISC Electrònica digital Àrees temàtiques de la UPC::Enginyeria electrònica |
| Summary: | This thesis focuses on enabling high performance storage capabilities in a RISC-V SoC through the integration and validation of an open source controller. Communication tests were carried out using SD cards on FPGA platforms, both in standalone environments and within the full system. |
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