Circuit proposal of a latching current limiter for space applications based on a SiC N-MOSFET

Latching Current Limiters (LCLs) provide individual over-current protection to payloads protecting the satellite power bus. Under an overload, they limit the maximum current for a certain time. After this time, if the failure persists, the LCL isolate it from the power bus. The keystone of the LCLs...

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Detalles Bibliográficos
Autores: López Antuña, Abraham|||0000-0002-8978-861X, Fernández Miaja, Pablo|||0000-0002-4419-1940, Arias Pérez de Azpeitia, Manuel|||0000-0002-0897-8594, Fernández González, Arturo José
Tipo de recurso: artículo
Fecha de publicación:2022
País:España
Institución:Universidad de Oviedo (UNIOVI)
Repositorio:RUO. Repositorio Institucional de la Universidad de Oviedo
Idioma:inglés
OAI Identifier:oai:digibuo.uniovi.es:10651/63286
Acceso en línea:http://hdl.handle.net/10651/63286
https://dx.doi.org/10.1109/JESTPE.2022.3163585
Access Level:acceso abierto
Palabra clave:LCL
Current protection
Wide bandgap devices
Satellite
Descripción
Sumario:Latching Current Limiters (LCLs) provide individual over-current protection to payloads protecting the satellite power bus. Under an overload, they limit the maximum current for a certain time. After this time, if the failure persists, the LCL isolate it from the power bus. The keystone of the LCLs is the current-limiting transistor. In traditional LCL designs, P-MOSFETs are used as the main current limiting device. However, in this work a complete LCL based on N-MOSFETs is presented. This change involves a complete redesign of the control circuitry. of the LCL architecture. The use of Silicon Carbide (SiC) is explored to assess the possibility of operating at higher voltages and potentially at higher temperatures. The paper shows a complete LCL design based on a SiC N-MOSFET. The design is tested implementing a class 10 LCL (10 A as nominal current) for a bus voltage of 100 V, a limitation current of 12 A, and for a limitation time (trip-off time) of 1.5 ms.