PVT compensated OTA design on SOI-CMOS nanometer technologies

In this study the design of a PVT compensated rail-to-rail input stage with constant transconductance and a high gain stage are presented, with the aim of providing a robust alternative to the problem of constant transconductance, reduced gain and at-band gain's variation of amplifiers in nanom...

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Detalles Bibliográficos
Autor: FRANCISCO JAVIER VILLOTA SALAZAR
Tipo de recurso: tesis de maestría
Estado:Versión aceptada para publicación
Fecha de publicación:2012
País:México
Institución:Instituto Nacional de Astrofísica, Óptica y Electrónica
Repositorio:Repositorio Institucional del INAOE
Idioma:inglés
OAI Identifier:oai:inaoe.repositorioinstitucional.mx:1009/781
Acceso en línea:http://inaoe.repositorioinstitucional.mx/jspui/handle/1009/781
Access Level:acceso abierto
Palabra clave:info:eu-repo/classification/Circuitos integrados analógicos CMOS/CMOS analogue integrated circuits
info:eu-repo/classification/Circuitos de procesamiento analógico/Analogue processing circuits
info:eu-repo/classification/Amplificadores/Amplifiers
info:eu-repo/classification/Amplificadores diferenciales/Differential amplifiers
info:eu-repo/classification/Amplificadores operacionales/Operational amplifiers
info:eu-repo/classification/cti/1
info:eu-repo/classification/cti/22
info:eu-repo/classification/cti/2203
Descripción
Sumario:In this study the design of a PVT compensated rail-to-rail input stage with constant transconductance and a high gain stage are presented, with the aim of providing a robust alternative to the problem of constant transconductance, reduced gain and at-band gain's variation of amplifiers in nanometer technologies. Initially, an overview about the main concerns to downscaling in transistor sizing and some characteristics and details about SOI nanometer technology are given in order to identify the advantages and drawbacks with respect to CMOS technology. Subsequently, a solution to the sizing problem in current technology is adopted, which make the design of circuits possible. A rail-to-rail input stage with constant transconductance is designed, whose outstanding characteristics are the high robustness to PVT variations and the easy integration with other stages. These characteristics are obtained using the Feedback Differential Pair (FDP) circuit, improving the biasing, sub-threshold region for input differential pairs and an addition current circuit with opposite behavior in temperature with respect to the input signal section. For the gain stage design, first the problem of at-band gain's variation had to be solved. Then, some topologies to obtain high gain are reviewed, and at the same time some design considerations are reviewed and proposed in order to identify robust topologies. Applying these considerations and the transconductance addition technique, a two stage amplifier with two transconductance additions is proposed, which reaches a high gain value without using cascode structures or boosting techniques. Finally, the two designed circuits are integrated as an OTA circuit, which is fully characterized including PVT and Monte Carlo simulations in order to verify that all the design considerations were correct.