Implementation of a neuron model using FPGAS
Artificial neural networks base their processing capabilities in a parallel architecture, and this makes them useful to solve pattern recognition, system identification, and control problems. In this paper, we present a FPGA (Field Programmable Gate Array) based digital implementation of a McCulloch...
| Autores: | , , , , , , , , |
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| Tipo de recurso: | artículo |
| Estado: | Versión publicada |
| Fecha de publicación: | 2003 |
| País: | México |
| Institución: | UNIVERSIDAD NACIONAL AUTÓNOMA DE MÉXICO |
| Repositorio: | Journal of Applied Research and Technology |
| Idioma: | inglés |
| OAI Identifier: | oai:ojs2.localhost:article/611 |
| Acceso en línea: | https://jart.icat.unam.mx/index.php/jart/article/view/611 |
| Access Level: | acceso abierto |
| Palabra clave: | Digital artificial neuron field programmable gate array McCullogh-Pitts neuron |
| Sumario: | Artificial neural networks base their processing capabilities in a parallel architecture, and this makes them useful to solve pattern recognition, system identification, and control problems. In this paper, we present a FPGA (Field Programmable Gate Array) based digital implementation of a McCulloch-Pitts type of neuron model with three types of non-linear activation function: step, ramp-saturation, and sigmoid. We present the VHDL language code used to implement the neurons as well as to present simulation results obtained with Xilinx Foundation 3.0 software. The results are analyzed in terms of speed and percentage of chip usage. |
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