Top-Down Design of a xDSL 14-bit 4MSh ZA Modulator in Digital CMOS Technology
This paper describes the design of a Sigma-Delta modulator aimed for A/D conversion in xDSL applications, featuring 14-bit@4Msample/s in a 0.35μm mainstream digital CMOS technology. Architecture selection, modulator sizing and cell sizing tasks where supported by a CAD methodology, thus allowing us...
| Authors: | , , , , |
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| Format: | article |
| Publication Date: | 2001 |
| Country: | España |
| Institution: | Consejo Superior de Investigaciones Científicas (CSIC) |
| Repository: | DIGITAL.CSIC. Repositorio Institucional del CSIC |
| OAI Identifier: | oai:digital.csic.es:10261/3765 |
| Online Access: | http://hdl.handle.net/10261/3765 |
| Access Level: | Open access |
| Keyword: | Top-down design DSL Analog-to-Digital Converters |
| Summary: | This paper describes the design of a Sigma-Delta modulator aimed for A/D conversion in xDSL applications, featuring 14-bit@4Msample/s in a 0.35μm mainstream digital CMOS technology. Architecture selection, modulator sizing and cell sizing tasks where supported by a CAD methodology, thus allowing us to obtain a power efficient implementation in a short design cycle. |
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