Convolutional neural network for subharmonics detection in hardware-in-the-loop

Hardware-In-the-Loop has become a popular technique for testing real-time complex systems. One of its possible applications is power converter modeling to test digital controllers. When a switching converter model is used, the output of the controller can be read incorrectly. Therefore, undesirable...

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Detalles Bibliográficos
Autores: Yushkova, Marina, Zambreno, Joseph, Sánchez González, Alberto, Castro Martín, Ángel de
Tipo de recurso: artículo
Fecha de publicación:2025
País:España
Institución:Universidad Autónoma de Madrid
Repositorio:Biblos-e Archivo. Repositorio Institucional de la UAM
Idioma:inglés
OAI Identifier:oai:repositorio.uam.es:10486/732360
Acceso en línea:https://hdl.handle.net/10486/732360
https://dx.doi.org/10.1080/03772063.2025.2493789
Access Level:acceso embargado
Palabra clave:Convolutional neural network
Real-time simulation
Hardware-in-the-loop
Switching converter
Power electronics
Telecomunicaciones
Descripción
Sumario:Hardware-In-the-Loop has become a popular technique for testing real-time complex systems. One of its possible applications is power converter modeling to test digital controllers. When a switching converter model is used, the output of the controller can be read incorrectly. Therefore, undesirable oscillations can appear in the output due to the aliasing effects, which prevent the twin model from its normal functionality. While there are various solutions present in academic and industrial research to address this arising problem, there is no automatic algorithm to detect it when a reference model is not available. In this paper, a one-dimensional convolutional neural network which allows detecting the aliasing distortions is implemented. The network was chosen due to the kind of signals to be classified – an inductor current of the converter model, which is in effect a 1D time sequence. The proposed CNN architecture is shallow and consists of 27 layers only. Despite its simplicity, it shows remarkable performance of more than 99% for both validation and testing datasets, and for the post-training characteristics. Moreover, it makes the architecture implementable in embedded systems, like real-time Hardware-In-the-Loop systems