Strategies for choosing an appropriate numerical method for FPGA-based HIL
Hardware-In-the-Loop (HIL) has become a very popular approach for power electronics testing in recent years due to its safety and low cost. Furthermore, the outcome of HIL techniques has improved with the incorporation of Field-Programmable Gate Arrays (FPGAs), which allow faster and more accurate r...
| Autores: | , , |
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| Tipo de recurso: | artículo |
| Fecha de publicación: | 2021 |
| País: | España |
| Institución: | Universidad Autónoma de Madrid |
| Repositorio: | Biblos-e Archivo. Repositorio Institucional de la UAM |
| Idioma: | inglés |
| OAI Identifier: | oai:repositorio.uam.es:10486/715882 |
| Acceso en línea: | http://hdl.handle.net/10486/715882 https://dx.doi.org/10.1016/j.ijepes.2021.107186 |
| Access Level: | acceso abierto |
| Palabra clave: | FPGA Hardware-in-the-Loop Numerical Methods Power Electronics Real-Time Simulation Switching Converter Telecomunicaciones |
| Sumario: | Hardware-In-the-Loop (HIL) has become a very popular approach for power electronics testing in recent years due to its safety and low cost. Furthermore, the outcome of HIL techniques has improved with the incorporation of Field-Programmable Gate Arrays (FPGAs), which allow faster and more accurate real-time simulations. The use of FPGAs in HIL implies some challenges, like the choice of a relevant numerical method for the implementation. The task is not trivial, because the numerical method should be executed in real time and it should obtain the best trade-off between accuracy and hardware resources using the smallest possible computation time. The HIL performance of four popular numerical methods is evaluated in this paper: 1st order Forward Euler, 2nd order Adams–Bashforth, 2nd order Runge–Kutta, and 4th order Runge–Kutta. Their error results with different simulation time steps and 32- and 64-bit resolutions are calculated. The methods are implemented in FPGA for the simulation of a simple power converter independently and as a part of an HIL system which includes a DAC. The hardware synthesis results are obtained along with the minimum execution time for each method. The results show that even though Runge–Kutta methods get the best accuracy outcome, once accuracy limiting factors in real environments are considered, the simplest methods (1st order Forward Euler and 2nd order Adams–Bashforth) gain the best overall performance considering Cost Performance Indexes |
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