Structural methods for the synthesis of speed-independent circuits
Asynchronous circuits can be modeled as concurrent systems in which events are interpreted as signal transitions. The synthesis of concurrent systems implies the analysis of a vast state space that often requires computationally expensive methods. This work presents new methods for the synthesis of...
| Autores: | , , , |
|---|---|
| Tipo de documento: | artigo |
| Data de publicação: | 1998 |
| País: | España |
| Recursos: | Universitat Politècnica de Catalunya (UPC) |
| Repositório: | UPCommons. Portal del coneixement obert de la UPC |
| Idioma: | inglês |
| OAI Identifier: | oai:upcommons.upc.edu:2117/125785 |
| Acesso em linha: | https://hdl.handle.net/2117/125785 https://dx.doi.org/10.1109/43.736185 |
| Access Level: | Acceso aberto |
| Palavra-chave: | Petri nets Digital integrated circuits Asynchronous circuits Speed-independent synthesis Petri, Xarxes de Circuits integrats digitals Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats |
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Structural methods for the synthesis of speed-independent circuitsPastor Llorens, Enric|||0000-0002-7587-8702Cortadella, Jordi|||0000-0001-8114-250XKondratyev, AlexRoig Mansilla, OriolPetri netsDigital integrated circuitsAsynchronous circuitsSpeed-independent synthesisPetri, Xarxes deCircuits integrats digitalsÀrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integratsAsynchronous circuits can be modeled as concurrent systems in which events are interpreted as signal transitions. The synthesis of concurrent systems implies the analysis of a vast state space that often requires computationally expensive methods. This work presents new methods for the synthesis of speed-independent circuits from a new perspective, overcoming both the analysis and computation complexity bottlenecks. The circuits are specified by free-choice signal transition graphs (STGs), a subclass of interpreted Petri nets. The synthesis approach is divided into the following steps: correctness, binary coding, implementability conditions, and logic synthesis. Each step is efficiently implemented by applying a set of structural techniques that analyze STGs without explicitly enumerating the underlying state space. Experimental results show that circuits can be generated from specifications that exceed in several orders of magnitude the largest STGs ever synthesized-with over 10/sup 27/ states. Computation times are also dramatically reduced. Nevertheless, the quality of results does not suffer from the use of structural techniques.Peer Reviewed19981998-11-0120182018-12-13journal articlehttp://purl.org/coar/resource_type/c_6501VoRhttp://purl.org/coar/version/c_970fb48d4fbd8a85info:eu-repo/semantics/articleapplication/pdfhttps://hdl.handle.net/2117/125785https://dx.doi.org/10.1109/43.736185reponame:UPCommons. Portal del coneixement obert de la UPCinstname:Universitat Politècnica de Catalunya (UPC)Inglésengopen accesshttp://purl.org/coar/access_right/c_abf2info:eu-repo/semantics/openAccessoai:upcommons.upc.edu:2117/1257852026-05-27T15:37:01Z |
| dc.title.none.fl_str_mv |
Structural methods for the synthesis of speed-independent circuits |
| title |
Structural methods for the synthesis of speed-independent circuits |
| spellingShingle |
Structural methods for the synthesis of speed-independent circuits Pastor Llorens, Enric|||0000-0002-7587-8702 Petri nets Digital integrated circuits Asynchronous circuits Speed-independent synthesis Petri, Xarxes de Circuits integrats digitals Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats |
| title_short |
Structural methods for the synthesis of speed-independent circuits |
| title_full |
Structural methods for the synthesis of speed-independent circuits |
| title_fullStr |
Structural methods for the synthesis of speed-independent circuits |
| title_full_unstemmed |
Structural methods for the synthesis of speed-independent circuits |
| title_sort |
Structural methods for the synthesis of speed-independent circuits |
| dc.creator.none.fl_str_mv |
Pastor Llorens, Enric|||0000-0002-7587-8702 Cortadella, Jordi|||0000-0001-8114-250X Kondratyev, Alex Roig Mansilla, Oriol |
| author |
Pastor Llorens, Enric|||0000-0002-7587-8702 |
| author_facet |
Pastor Llorens, Enric|||0000-0002-7587-8702 Cortadella, Jordi|||0000-0001-8114-250X Kondratyev, Alex Roig Mansilla, Oriol |
| author_role |
author |
| author2 |
Cortadella, Jordi|||0000-0001-8114-250X Kondratyev, Alex Roig Mansilla, Oriol |
| author2_role |
author author author |
| dc.subject.none.fl_str_mv |
Petri nets Digital integrated circuits Asynchronous circuits Speed-independent synthesis Petri, Xarxes de Circuits integrats digitals Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats |
| topic |
Petri nets Digital integrated circuits Asynchronous circuits Speed-independent synthesis Petri, Xarxes de Circuits integrats digitals Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats |
| description |
Asynchronous circuits can be modeled as concurrent systems in which events are interpreted as signal transitions. The synthesis of concurrent systems implies the analysis of a vast state space that often requires computationally expensive methods. This work presents new methods for the synthesis of speed-independent circuits from a new perspective, overcoming both the analysis and computation complexity bottlenecks. The circuits are specified by free-choice signal transition graphs (STGs), a subclass of interpreted Petri nets. The synthesis approach is divided into the following steps: correctness, binary coding, implementability conditions, and logic synthesis. Each step is efficiently implemented by applying a set of structural techniques that analyze STGs without explicitly enumerating the underlying state space. Experimental results show that circuits can be generated from specifications that exceed in several orders of magnitude the largest STGs ever synthesized-with over 10/sup 27/ states. Computation times are also dramatically reduced. Nevertheless, the quality of results does not suffer from the use of structural techniques. |
| publishDate |
1998 |
| dc.date.none.fl_str_mv |
1998 1998-11-01 2018 2018-12-13 |
| dc.type.none.fl_str_mv |
journal article http://purl.org/coar/resource_type/c_6501 VoR http://purl.org/coar/version/c_970fb48d4fbd8a85 |
| dc.type.openaire.fl_str_mv |
info:eu-repo/semantics/article |
| format |
article |
| dc.identifier.none.fl_str_mv |
https://hdl.handle.net/2117/125785 https://dx.doi.org/10.1109/43.736185 |
| url |
https://hdl.handle.net/2117/125785 https://dx.doi.org/10.1109/43.736185 |
| dc.language.none.fl_str_mv |
Inglés eng |
| language_invalid_str_mv |
Inglés |
| language |
eng |
| dc.rights.none.fl_str_mv |
open access http://purl.org/coar/access_right/c_abf2 |
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info:eu-repo/semantics/openAccess |
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open access http://purl.org/coar/access_right/c_abf2 |
| eu_rights_str_mv |
openAccess |
| dc.format.none.fl_str_mv |
application/pdf |
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reponame:UPCommons. Portal del coneixement obert de la UPC instname:Universitat Politècnica de Catalunya (UPC) |
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Universitat Politècnica de Catalunya (UPC) |
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UPCommons. Portal del coneixement obert de la UPC |
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UPCommons. Portal del coneixement obert de la UPC |
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1869422440555216896 |
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15,300719 |