Synthesis of asynchronous controllers using integer linear programming

A novel strategy for the logic synthesis of asynchronous control circuits is presented. It is based on the structural theory of Petri nets and integer linear programming. Techniques that are capable of checking implementability conditions, such as complete state coding, and deriving a gate netlist t...

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Detalles Bibliográficos
Autores: Carmona Vargas, Josep|||0000-0001-9656-254X, Colom Piazuelo, José Manuel, Cortadella, Jordi|||0000-0001-8114-250X, García-Vallés, Fernando
Tipo de recurso: artículo
Fecha de publicación:2006
País:España
Institución:Universitat Politècnica de Catalunya (UPC)
Repositorio:UPCommons. Portal del coneixement obert de la UPC
Idioma:inglés
OAI Identifier:oai:upcommons.upc.edu:2117/126231
Acceso en línea:https://hdl.handle.net/2117/126231
https://dx.doi.org/10.1109/TCAD.2005.859516
Access Level:acceso abierto
Palabra clave:Integer programming
Logic design
Petri nets
Asynchronous circuits
Logic synthesis
Structural methods
Programació en nombres enters
Estructura lògica
Petri, Xarxes de
Circuits asíncrons
Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats
Descripción
Sumario:A novel strategy for the logic synthesis of asynchronous control circuits is presented. It is based on the structural theory of Petri nets and integer linear programming. Techniques that are capable of checking implementability conditions, such as complete state coding, and deriving a gate netlist to implement the specified behavior are presented. These techniques can handle Petri net specifications consisting of several thousands of transitions and provide a significant speed-up compared with techniques that have previously been proposed.