Effect of interlayer trapping and detrapping on the determination of interface state densities on high-k dielectric stacks

Al/HfO(2)/SiNx:H/n-Si metal-insulator-semiconductor (MIS) capacitors have been studied by electrical characterization. Films of silicon nitride were directly grown on n-type silicon substrates by electron-cyclotron-resonance assisted chemical-vapor-deposition (ECR-CVD). Silicon nitride thickness was...

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Bibliographic Details
Authors: Martil De La Plaza, Ignacio, González Díaz, Germán, Prado Millán, Álvaro Del
Format: book part
Publication Date:2009
Country:España
Institution:Universidad Complutense de Madrid (UCM)
Repository:Docta Complutense
Language:English
OAI Identifier:oai:docta.ucm.es:20.500.14352/53366
Online Access:https://hdl.handle.net/20.500.14352/53366
Access Level:Open access
Keyword:537
Kappa Gate Dielectrics
Electrical-Properties
Transistors.
Electricidad
Electrónica (Física)
2202.03 Electricidad
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oai_identifier_str oai:docta.ucm.es:20.500.14352/53366
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network_name_str España
repository_id_str
spelling Effect of interlayer trapping and detrapping on the determination of interface state densities on high-k dielectric stacksMartil De La Plaza, IgnacioGonzález Díaz, GermánPrado Millán, Álvaro Del537Kappa Gate DielectricsElectrical-PropertiesTransistors.ElectricidadElectrónica (Física)2202.03 ElectricidadAl/HfO(2)/SiNx:H/n-Si metal-insulator-semiconductor (MIS) capacitors have been studied by electrical characterization. Films of silicon nitride were directly grown on n-type silicon substrates by electron-cyclotron-resonance assisted chemical-vapor-deposition (ECR-CVD). Silicon nitride thickness was varied from 2.96 to 6.64 nm. Afterwards, 12 nm thick hafnium oxide films were deposited by the high-pressure reactive sputtering (HPS) approach. Interface state densities were determined by deep-level transient spectroscopy and simultaneous high and low frequency capacitance-voltage (HLCV). The simultaneous measurements of the high and low frequency capacitance voltage provide interface trap density values in the range of 10(11) cm(2) eV(-1) for all the samples. However, a significant increase of this density of about two orders of magnitude was obtained by DLTS for the thinnest silicon nitride interfacial layers. In this work we probe that this increase is an artifact that must be attributed to traps existing at the HfO(2)/SiN(x):H interlayer interface. These traps are more easily charged or discharged as this interface comes near the substrate, that is, as thinner the SiN(x):H interface layer. The trapping/detrapping mechanisms increase the capacitance transient and, in consequence, the DLTS measurements have contributions not only from the insulator/substrate interface but also from the HfO(2)/SiN(x):H interlayer interface.IEEEUniversidad Complutense de Madrid20092009-01-0120092009-01-01book parthttp://purl.org/coar/resource_type/c_3248info:eu-repo/semantics/bookPartapplication/pdfhttps://hdl.handle.net/20.500.14352/53366reponame:Docta Complutenseinstname:Universidad Complutense de Madrid (UCM)Inglésengopen accesshttp://purl.org/coar/access_right/c_abf2info:eu-repo/semantics/openAccessoai:docta.ucm.es:20.500.14352/533662026-06-02T12:44:21Z
dc.title.none.fl_str_mv Effect of interlayer trapping and detrapping on the determination of interface state densities on high-k dielectric stacks
title Effect of interlayer trapping and detrapping on the determination of interface state densities on high-k dielectric stacks
spellingShingle Effect of interlayer trapping and detrapping on the determination of interface state densities on high-k dielectric stacks
Martil De La Plaza, Ignacio
537
Kappa Gate Dielectrics
Electrical-Properties
Transistors.
Electricidad
Electrónica (Física)
2202.03 Electricidad
title_short Effect of interlayer trapping and detrapping on the determination of interface state densities on high-k dielectric stacks
title_full Effect of interlayer trapping and detrapping on the determination of interface state densities on high-k dielectric stacks
title_fullStr Effect of interlayer trapping and detrapping on the determination of interface state densities on high-k dielectric stacks
title_full_unstemmed Effect of interlayer trapping and detrapping on the determination of interface state densities on high-k dielectric stacks
title_sort Effect of interlayer trapping and detrapping on the determination of interface state densities on high-k dielectric stacks
dc.creator.none.fl_str_mv Martil De La Plaza, Ignacio
González Díaz, Germán
Prado Millán, Álvaro Del
author Martil De La Plaza, Ignacio
author_facet Martil De La Plaza, Ignacio
González Díaz, Germán
Prado Millán, Álvaro Del
author_role author
author2 González Díaz, Germán
Prado Millán, Álvaro Del
author2_role author
author
dc.contributor.none.fl_str_mv Universidad Complutense de Madrid
dc.subject.none.fl_str_mv 537
Kappa Gate Dielectrics
Electrical-Properties
Transistors.
Electricidad
Electrónica (Física)
2202.03 Electricidad
topic 537
Kappa Gate Dielectrics
Electrical-Properties
Transistors.
Electricidad
Electrónica (Física)
2202.03 Electricidad
description Al/HfO(2)/SiNx:H/n-Si metal-insulator-semiconductor (MIS) capacitors have been studied by electrical characterization. Films of silicon nitride were directly grown on n-type silicon substrates by electron-cyclotron-resonance assisted chemical-vapor-deposition (ECR-CVD). Silicon nitride thickness was varied from 2.96 to 6.64 nm. Afterwards, 12 nm thick hafnium oxide films were deposited by the high-pressure reactive sputtering (HPS) approach. Interface state densities were determined by deep-level transient spectroscopy and simultaneous high and low frequency capacitance-voltage (HLCV). The simultaneous measurements of the high and low frequency capacitance voltage provide interface trap density values in the range of 10(11) cm(2) eV(-1) for all the samples. However, a significant increase of this density of about two orders of magnitude was obtained by DLTS for the thinnest silicon nitride interfacial layers. In this work we probe that this increase is an artifact that must be attributed to traps existing at the HfO(2)/SiN(x):H interlayer interface. These traps are more easily charged or discharged as this interface comes near the substrate, that is, as thinner the SiN(x):H interface layer. The trapping/detrapping mechanisms increase the capacitance transient and, in consequence, the DLTS measurements have contributions not only from the insulator/substrate interface but also from the HfO(2)/SiN(x):H interlayer interface.
publishDate 2009
dc.date.none.fl_str_mv 2009
2009-01-01
2009
2009-01-01
dc.type.none.fl_str_mv book part
http://purl.org/coar/resource_type/c_3248
dc.type.openaire.fl_str_mv info:eu-repo/semantics/bookPart
format bookPart
dc.identifier.none.fl_str_mv https://hdl.handle.net/20.500.14352/53366
url https://hdl.handle.net/20.500.14352/53366
dc.language.none.fl_str_mv Inglés
eng
language_invalid_str_mv Inglés
language eng
dc.rights.none.fl_str_mv open access
http://purl.org/coar/access_right/c_abf2
dc.rights.openaire.fl_str_mv info:eu-repo/semantics/openAccess
rights_invalid_str_mv open access
http://purl.org/coar/access_right/c_abf2
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
dc.publisher.none.fl_str_mv IEEE
publisher.none.fl_str_mv IEEE
dc.source.none.fl_str_mv reponame:Docta Complutense
instname:Universidad Complutense de Madrid (UCM)
instname_str Universidad Complutense de Madrid (UCM)
reponame_str Docta Complutense
collection Docta Complutense
repository.name.fl_str_mv
repository.mail.fl_str_mv
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score 15,301603

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