MAREX: A general purpose hardware architecture for membrane computing

Membrane computing is an unconventional computing paradigm that has gained much attention in recent decades because of its massively parallel character and its usefulness to build models of complex systems. However, until now, there was no generic hardware implementation of P systems. Computational...

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Autores: Cascado Caballero, Daniel, Díaz del Río, Fernando, Cagigas Muñiz, Daniel, Ríos Navarro, José Antonio, Guisado Lizar, José Luis, Pérez Hurtado de Mendoza, Ignacio, Riscos Núñez, Agustín
Tipo de recurso: artículo
Estado:Versión publicada
Fecha de publicación:2022
País:España
Institución:Universidad de Sevilla (US)
Repositorio:idUS. Depósito de Investigación de la Universidad de Sevilla
OAI Identifier:oai:idus.us.es:11441/128977
Acceso en línea:https://hdl.handle.net/11441/128977
https://doi.org/10.1016/j.ins.2021.10.064
Access Level:acceso abierto
Palabra clave:Unconventional computing
Parallel architectures
Membrane computing
P systems
Hardware design
id ES_dc7ddb60a2be6beaae4ba17c56fa808a
oai_identifier_str oai:idus.us.es:11441/128977
network_acronym_str ES
network_name_str España
repository_id_str
spelling MAREX: A general purpose hardware architecture for membrane computingCascado Caballero, DanielDíaz del Río, FernandoCagigas Muñiz, DanielRíos Navarro, José AntonioGuisado Lizar, José LuisPérez Hurtado de Mendoza, IgnacioRiscos Núñez, AgustínUnconventional computingParallel architecturesMembrane computingP systemsHardware designMembrane computing is an unconventional computing paradigm that has gained much attention in recent decades because of its massively parallel character and its usefulness to build models of complex systems. However, until now, there was no generic hardware implementation of P systems. Computational frameworks to execute P systems up to this day rely on the simulation of the parallel working mechanisms of P systems by inherently sequential algorithms. Such algorithms can then be implemented as is or can be parallelized, up to a certain point, to run on parallel computers. However, this is not as efficient as a dedicated parallel hardware implementation. There have been ad hoc implementations of particular P systems for parallel hardware, but they lack to be problem-generic or they are not scalable enough to implement large P systems. In this paper, a first intrinsically parallel hardware architecture to implement generic P system models is introduced. It is designed to be straightforwardly implemented in programmable logic circuits like FPGAs. The feasibility and correct execution of our architecture has been verified by means of a simulator, and several simulation results for different P system examples have been analysed to foresee the pros and cons of this design.Ministerio de Ciencia e Innovacion of Spain and the AEI/FEDER (EU) project TIN2017-89842-P (MABICAP)Ministerio de Ciencia e Innovacion of Spain and the AEI/FEDER (EU) project PID2019-110455GB-I00 (Par-HoT)ElsevierArquitectura y Tecnología de ComputadoresCiencias de la Computación e Inteligencia ArtificialTEP108: Robótica y Tecnología de ComputadoresTIC193: Computación Natural2022info:eu-repo/semantics/articleinfo:eu-repo/semantics/publishedVersionapplication/pdfapplication/pdfhttps://hdl.handle.net/11441/128977https://doi.org/10.1016/j.ins.2021.10.064reponame:idUS. Depósito de Investigación de la Universidad de Sevillainstname:Universidad de Sevilla (US)InglésInformation Sciences, 584 (January), 360-386.TIN2017-89842-P (MABICAP)PID2019-110455GB-I00 (Par-HoT)https://www.sciencedirect.com/science/article/pii/S0020025521010860?via%3Dihubinfo:eu-repo/semantics/openAccessoai:idus.us.es:11441/1289772026-06-17T12:51:07Z
dc.title.none.fl_str_mv MAREX: A general purpose hardware architecture for membrane computing
title MAREX: A general purpose hardware architecture for membrane computing
spellingShingle MAREX: A general purpose hardware architecture for membrane computing
Cascado Caballero, Daniel
Unconventional computing
Parallel architectures
Membrane computing
P systems
Hardware design
title_short MAREX: A general purpose hardware architecture for membrane computing
title_full MAREX: A general purpose hardware architecture for membrane computing
title_fullStr MAREX: A general purpose hardware architecture for membrane computing
title_full_unstemmed MAREX: A general purpose hardware architecture for membrane computing
title_sort MAREX: A general purpose hardware architecture for membrane computing
dc.creator.none.fl_str_mv Cascado Caballero, Daniel
Díaz del Río, Fernando
Cagigas Muñiz, Daniel
Ríos Navarro, José Antonio
Guisado Lizar, José Luis
Pérez Hurtado de Mendoza, Ignacio
Riscos Núñez, Agustín
author Cascado Caballero, Daniel
author_facet Cascado Caballero, Daniel
Díaz del Río, Fernando
Cagigas Muñiz, Daniel
Ríos Navarro, José Antonio
Guisado Lizar, José Luis
Pérez Hurtado de Mendoza, Ignacio
Riscos Núñez, Agustín
author_role author
author2 Díaz del Río, Fernando
Cagigas Muñiz, Daniel
Ríos Navarro, José Antonio
Guisado Lizar, José Luis
Pérez Hurtado de Mendoza, Ignacio
Riscos Núñez, Agustín
author2_role author
author
author
author
author
author
dc.contributor.none.fl_str_mv Arquitectura y Tecnología de Computadores
Ciencias de la Computación e Inteligencia Artificial
TEP108: Robótica y Tecnología de Computadores
TIC193: Computación Natural
dc.subject.none.fl_str_mv Unconventional computing
Parallel architectures
Membrane computing
P systems
Hardware design
topic Unconventional computing
Parallel architectures
Membrane computing
P systems
Hardware design
description Membrane computing is an unconventional computing paradigm that has gained much attention in recent decades because of its massively parallel character and its usefulness to build models of complex systems. However, until now, there was no generic hardware implementation of P systems. Computational frameworks to execute P systems up to this day rely on the simulation of the parallel working mechanisms of P systems by inherently sequential algorithms. Such algorithms can then be implemented as is or can be parallelized, up to a certain point, to run on parallel computers. However, this is not as efficient as a dedicated parallel hardware implementation. There have been ad hoc implementations of particular P systems for parallel hardware, but they lack to be problem-generic or they are not scalable enough to implement large P systems. In this paper, a first intrinsically parallel hardware architecture to implement generic P system models is introduced. It is designed to be straightforwardly implemented in programmable logic circuits like FPGAs. The feasibility and correct execution of our architecture has been verified by means of a simulator, and several simulation results for different P system examples have been analysed to foresee the pros and cons of this design.
publishDate 2022
dc.date.none.fl_str_mv 2022
dc.type.none.fl_str_mv info:eu-repo/semantics/article
info:eu-repo/semantics/publishedVersion
format article
status_str publishedVersion
dc.identifier.none.fl_str_mv https://hdl.handle.net/11441/128977
https://doi.org/10.1016/j.ins.2021.10.064
url https://hdl.handle.net/11441/128977
https://doi.org/10.1016/j.ins.2021.10.064
dc.language.none.fl_str_mv Inglés
language_invalid_str_mv Inglés
dc.relation.none.fl_str_mv Information Sciences, 584 (January), 360-386.
TIN2017-89842-P (MABICAP)
PID2019-110455GB-I00 (Par-HoT)
https://www.sciencedirect.com/science/article/pii/S0020025521010860?via%3Dihub
dc.rights.none.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
application/pdf
dc.publisher.none.fl_str_mv Elsevier
publisher.none.fl_str_mv Elsevier
dc.source.none.fl_str_mv reponame:idUS. Depósito de Investigación de la Universidad de Sevilla
instname:Universidad de Sevilla (US)
instname_str Universidad de Sevilla (US)
reponame_str idUS. Depósito de Investigación de la Universidad de Sevilla
collection idUS. Depósito de Investigación de la Universidad de Sevilla
repository.name.fl_str_mv
repository.mail.fl_str_mv
_version_ 1869421773855916032
score 15,300719

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