A new high-level synthesis methodology of cascaded continuous-time ΣΔ modulators
This brief presents an efficient method for synthesizing cascaded sigma–delta modulators implemented with continuous-time circuits. It is based on the direct synthesis of the whole cascaded architecture in the continuous-time domain instead of using a discrete-to-continuous time transformation as ha...
| Autores: | , , , |
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| Tipo de recurso: | artículo |
| Estado: | Versión aceptada para publicación |
| Fecha de publicación: | 2006 |
| País: | España |
| Institución: | Universidad de Sevilla (US) |
| Repositorio: | idUS. Depósito de Investigación de la Universidad de Sevilla |
| OAI Identifier: | oai:idus.us.es:11441/78266 |
| Acceso en línea: | https://hdl.handle.net/11441/78266 https://doi.org/10.1109/TCSII.2006.875310 |
| Access Level: | acceso abierto |
| Palabra clave: | Analog-to-digital converters Continuous-time ΣΔ modulation |
| id |
ES_ca7b5a800fceea9a36fd41f5dbbf0644 |
|---|---|
| oai_identifier_str |
oai:idus.us.es:11441/78266 |
| network_acronym_str |
ES |
| network_name_str |
España |
| repository_id_str |
|
| spelling |
A new high-level synthesis methodology of cascaded continuous-time ΣΔ modulatorsTortosa Navas, RamónRosa Utrera, José Manuel de laFernández Fernández, Francisco VidalRodríguez Vázquez, Ángel BenitoAnalog-to-digital convertersContinuous-time ΣΔ modulationThis brief presents an efficient method for synthesizing cascaded sigma–delta modulators implemented with continuous-time circuits. It is based on the direct synthesis of the whole cascaded architecture in the continuous-time domain instead of using a discrete-to-continuous time transformation as has been done in previous approaches. In addition to placing the zeroes of the loop filter in an optimum way, the proposed methodology leads to more efficient architectures in terms of circuitry complexity, power consumption and robustness with respect to circuit errors.Ministerio de Educación y Ciencia TEC2004-01752/MICInstitute of Electrical and Electronics EngineersElectrónica y ElectromagnetismoMinisterio de Educación y Ciencia (MEC). España2006info:eu-repo/semantics/articleinfo:eu-repo/semantics/acceptedVersionapplication/pdfapplication/pdfhttps://hdl.handle.net/11441/78266https://doi.org/10.1109/TCSII.2006.875310reponame:idUS. Depósito de Investigación de la Universidad de Sevillainstname:Universidad de Sevilla (US)InglésIEEE Transactions on Circuits and Systems II: Express Briefs, 53 (8), 739-743.TEC2004-01752/MIChttp://dx.doi.org/10.1109/TCSII.2006.875310info:eu-repo/semantics/openAccessoai:idus.us.es:11441/782662026-06-17T12:51:07Z |
| dc.title.none.fl_str_mv |
A new high-level synthesis methodology of cascaded continuous-time ΣΔ modulators |
| title |
A new high-level synthesis methodology of cascaded continuous-time ΣΔ modulators |
| spellingShingle |
A new high-level synthesis methodology of cascaded continuous-time ΣΔ modulators Tortosa Navas, Ramón Analog-to-digital converters Continuous-time ΣΔ modulation |
| title_short |
A new high-level synthesis methodology of cascaded continuous-time ΣΔ modulators |
| title_full |
A new high-level synthesis methodology of cascaded continuous-time ΣΔ modulators |
| title_fullStr |
A new high-level synthesis methodology of cascaded continuous-time ΣΔ modulators |
| title_full_unstemmed |
A new high-level synthesis methodology of cascaded continuous-time ΣΔ modulators |
| title_sort |
A new high-level synthesis methodology of cascaded continuous-time ΣΔ modulators |
| dc.creator.none.fl_str_mv |
Tortosa Navas, Ramón Rosa Utrera, José Manuel de la Fernández Fernández, Francisco Vidal Rodríguez Vázquez, Ángel Benito |
| author |
Tortosa Navas, Ramón |
| author_facet |
Tortosa Navas, Ramón Rosa Utrera, José Manuel de la Fernández Fernández, Francisco Vidal Rodríguez Vázquez, Ángel Benito |
| author_role |
author |
| author2 |
Rosa Utrera, José Manuel de la Fernández Fernández, Francisco Vidal Rodríguez Vázquez, Ángel Benito |
| author2_role |
author author author |
| dc.contributor.none.fl_str_mv |
Electrónica y Electromagnetismo Ministerio de Educación y Ciencia (MEC). España |
| dc.subject.none.fl_str_mv |
Analog-to-digital converters Continuous-time ΣΔ modulation |
| topic |
Analog-to-digital converters Continuous-time ΣΔ modulation |
| description |
This brief presents an efficient method for synthesizing cascaded sigma–delta modulators implemented with continuous-time circuits. It is based on the direct synthesis of the whole cascaded architecture in the continuous-time domain instead of using a discrete-to-continuous time transformation as has been done in previous approaches. In addition to placing the zeroes of the loop filter in an optimum way, the proposed methodology leads to more efficient architectures in terms of circuitry complexity, power consumption and robustness with respect to circuit errors. |
| publishDate |
2006 |
| dc.date.none.fl_str_mv |
2006 |
| dc.type.none.fl_str_mv |
info:eu-repo/semantics/article info:eu-repo/semantics/acceptedVersion |
| format |
article |
| status_str |
acceptedVersion |
| dc.identifier.none.fl_str_mv |
https://hdl.handle.net/11441/78266 https://doi.org/10.1109/TCSII.2006.875310 |
| url |
https://hdl.handle.net/11441/78266 https://doi.org/10.1109/TCSII.2006.875310 |
| dc.language.none.fl_str_mv |
Inglés |
| language_invalid_str_mv |
Inglés |
| dc.relation.none.fl_str_mv |
IEEE Transactions on Circuits and Systems II: Express Briefs, 53 (8), 739-743. TEC2004-01752/MIC http://dx.doi.org/10.1109/TCSII.2006.875310 |
| dc.rights.none.fl_str_mv |
info:eu-repo/semantics/openAccess |
| eu_rights_str_mv |
openAccess |
| dc.format.none.fl_str_mv |
application/pdf application/pdf |
| dc.publisher.none.fl_str_mv |
Institute of Electrical and Electronics Engineers |
| publisher.none.fl_str_mv |
Institute of Electrical and Electronics Engineers |
| dc.source.none.fl_str_mv |
reponame:idUS. Depósito de Investigación de la Universidad de Sevilla instname:Universidad de Sevilla (US) |
| instname_str |
Universidad de Sevilla (US) |
| reponame_str |
idUS. Depósito de Investigación de la Universidad de Sevilla |
| collection |
idUS. Depósito de Investigación de la Universidad de Sevilla |
| repository.name.fl_str_mv |
|
| repository.mail.fl_str_mv |
|
| _version_ |
1869419483881275392 |
| score |
15.300724 |