5GHz CMOS all-pass filter-based true time delay cell
Analog CMOS time-delay cells realized by passive components, e.g., lumped LC delay lines, are inefficient in terms of area for multi-GHz frequencies. All-pass filters considered as active circuits can, therefore, be the best candidates to approximate time delays. This paper proposes a broadband firs...
| Autores: | , , |
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| Tipo de recurso: | capítulo de libro |
| Fecha de publicación: | 2020 |
| País: | España |
| Institución: | Universitat Politècnica de Catalunya (UPC) |
| Repositorio: | UPCommons. Portal del coneixement obert de la UPC |
| Idioma: | inglés |
| OAI Identifier: | oai:upcommons.upc.edu:2117/343652 |
| Acceso en línea: | https://hdl.handle.net/2117/343652 https://dx.doi.org/10.3390/books978-3-03928-295-1 |
| Access Level: | acceso abierto |
| Palabra clave: | Complementary metal oxide semiconductors All-pass filter CMOS Time delay Broadband True-time-delay Metall-òxid-semiconductors complementaris Àrees temàtiques de la UPC::Enginyeria electrònica |
| Sumario: | Analog CMOS time-delay cells realized by passive components, e.g., lumped LC delay lines, are inefficient in terms of area for multi-GHz frequencies. All-pass filters considered as active circuits can, therefore, be the best candidates to approximate time delays. This paper proposes a broadband first-order voltage-mode all-pass filter as a true-time-delay cell. The proposed true-time-delay cell is capable of tuning delay, demonstrating its potential capability to be used in different systems, e.g., RF beam-formers. The proposed filter achieves a flat group delay of over 60 ps with a pole/zero pair located at 5 GHz. This proposed circuit consumes only 10 mW power from a 1.8-V supply. To demonstrate the performance of the proposed all-pass filter, simulation results are conducted by using Virtuoso Cadence in a standard TSMC 180-nm CMOS process. |
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