High resolution FPGA DPWM based on variable clock phase shifting
Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lis...
| Autores: | , |
|---|---|
| Tipo de recurso: | artículo |
| Fecha de publicación: | 2010 |
| País: | España |
| Institución: | Universidad Autónoma de Madrid |
| Repositorio: | Biblos-e Archivo. Repositorio Institucional de la UAM |
| Idioma: | inglés |
| OAI Identifier: | oai:repositorio.uam.es:10486/666444 |
| Acceso en línea: | http://hdl.handle.net/10486/666444 https://dx.doi.org/10.1109/TPEL.2009.2037818 |
| Access Level: | acceso abierto |
| Palabra clave: | Digital control Field-programmable gate arrays (FPGAs) Pulsewidth modulation (PWM) Signal resolution Telecomunicaciones |
| Sumario: | Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. A. de Castro, "High resolution FPGA DPWM based on variable clock phase shifting" IEEE Transactions on Power Electronics – Letters section, vol.25, no.5, pp.1115 - 1119, mayo 2010 |
|---|