Readout electronics for LGAD sensors

In this paper, an ASIC fabricated in 180 nm CMOS technology from AMS with the very front-end electronics used to readout LGAD sensors is presented as well as its experimental results. The front-end has the typical architecture for Si-strip readout, i.e., preamplification stage with a Charge Sensitiv...

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Autores: Alonso Casanovas, Oscar, Franch Masdeu, Nil, Canals Gil, Joan, Palacio Bonet, Francisco, López de Miguel, Manuel, Vilà i Arbonès, Anna Maria, Diéguez Barrientos, Àngel, Carulla, Montserrat, 1930-, Flores, D., Hidalgo, S., Merlos, A., Pellegrini, G., Quirion, D.
Tipo de recurso: artículo
Estado:Versión publicada
Fecha de publicación:2017
País:España
Institución:Universidad de Barcelona
Repositorio:Dipòsit Digital de la UB
OAI Identifier:oai:diposit.ub.edu:2445/136698
Acceso en línea:https://hdl.handle.net/2445/136698
Access Level:acceso abierto
Palabra clave:Circuits electrònics
Electronic circuits
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spelling Readout electronics for LGAD sensorsAlonso Casanovas, OscarFranch Masdeu, NilCanals Gil, JoanPalacio Bonet, FranciscoLópez de Miguel, ManuelVilà i Arbonès, Anna MariaDiéguez Barrientos, ÀngelCarulla, Montserrat, 1930-Flores, D.Hidalgo, S.Merlos, A.Pellegrini, G.Quirion, D.Circuits electrònicsElectronic circuitsIn this paper, an ASIC fabricated in 180 nm CMOS technology from AMS with the very front-end electronics used to readout LGAD sensors is presented as well as its experimental results. The front-end has the typical architecture for Si-strip readout, i.e., preamplification stage with a Charge Sensitive Amplifier (CSA) followed by a CR-RC shaper. Both amplifiers are based on a folded cascode structure with a PMOS input transistor and the shaper only uses passive elements for the feedback stage. The CSA has programmable gain and a configurable input stage in order to adapt to the different input capacitance of the LGAD sensors (pixelated, short and long strips) and to the different input signal (depending on the gain of the LGAD). The fabricated prototype has an area of 0.865 mm × 0.965 mm and includes the biasing circuit for the CSA and the shaper, 4 analog channels (CSA+shaper) and programmable charge injection circuits included for testing purposes. Noise and power analysis performed during simulation fixed the size of the input transistor to W/L = 860 μm/0.2 μm. The shaping time is fixed by design at 1 us and, in this ASIC version, the feedback elements of the shaper are passive, which means that the area of the shaper can be reduced using active elements in future versions. Finally, the different gains of the CSA have been selected to maintain an ENC below 400 electrons for a detector capacitor of 20 pF, with a power consumption of 150 μ W per channel.Institute of Physics (IOP)2017info:eu-repo/semantics/articleinfo:eu-repo/semantics/publishedVersionapplication/pdfhttps://hdl.handle.net/2445/136698Articles publicats en revistes (Enginyeria Electrònica i Biomèdica)reponame:Dipòsit Digital de la UBinstname:Universidad de BarcelonaInglésReproducció del document publicat a: https://doi.org/10.1088/1748-0221/12/02/C02069Journal of Instrumentation, 2017, vol. 12https://doi.org/10.1088/1748-0221/12/02/C02069info:eu-repo/grantAgreement/EC/H2020/737089cc-by (c) Alonso Casanovas, Oscar et al., 2017http://creativecommons.org/licenses/by/3.0/esinfo:eu-repo/semantics/openAccessoai:diposit.ub.edu:2445/1366982026-05-27T06:46:51Z
dc.title.none.fl_str_mv Readout electronics for LGAD sensors
title Readout electronics for LGAD sensors
spellingShingle Readout electronics for LGAD sensors
Alonso Casanovas, Oscar
Circuits electrònics
Electronic circuits
title_short Readout electronics for LGAD sensors
title_full Readout electronics for LGAD sensors
title_fullStr Readout electronics for LGAD sensors
title_full_unstemmed Readout electronics for LGAD sensors
title_sort Readout electronics for LGAD sensors
dc.creator.none.fl_str_mv Alonso Casanovas, Oscar
Franch Masdeu, Nil
Canals Gil, Joan
Palacio Bonet, Francisco
López de Miguel, Manuel
Vilà i Arbonès, Anna Maria
Diéguez Barrientos, Àngel
Carulla, Montserrat, 1930-
Flores, D.
Hidalgo, S.
Merlos, A.
Pellegrini, G.
Quirion, D.
author Alonso Casanovas, Oscar
author_facet Alonso Casanovas, Oscar
Franch Masdeu, Nil
Canals Gil, Joan
Palacio Bonet, Francisco
López de Miguel, Manuel
Vilà i Arbonès, Anna Maria
Diéguez Barrientos, Àngel
Carulla, Montserrat, 1930-
Flores, D.
Hidalgo, S.
Merlos, A.
Pellegrini, G.
Quirion, D.
author_role author
author2 Franch Masdeu, Nil
Canals Gil, Joan
Palacio Bonet, Francisco
López de Miguel, Manuel
Vilà i Arbonès, Anna Maria
Diéguez Barrientos, Àngel
Carulla, Montserrat, 1930-
Flores, D.
Hidalgo, S.
Merlos, A.
Pellegrini, G.
Quirion, D.
author2_role author
author
author
author
author
author
author
author
author
author
author
author
dc.subject.none.fl_str_mv Circuits electrònics
Electronic circuits
topic Circuits electrònics
Electronic circuits
description In this paper, an ASIC fabricated in 180 nm CMOS technology from AMS with the very front-end electronics used to readout LGAD sensors is presented as well as its experimental results. The front-end has the typical architecture for Si-strip readout, i.e., preamplification stage with a Charge Sensitive Amplifier (CSA) followed by a CR-RC shaper. Both amplifiers are based on a folded cascode structure with a PMOS input transistor and the shaper only uses passive elements for the feedback stage. The CSA has programmable gain and a configurable input stage in order to adapt to the different input capacitance of the LGAD sensors (pixelated, short and long strips) and to the different input signal (depending on the gain of the LGAD). The fabricated prototype has an area of 0.865 mm × 0.965 mm and includes the biasing circuit for the CSA and the shaper, 4 analog channels (CSA+shaper) and programmable charge injection circuits included for testing purposes. Noise and power analysis performed during simulation fixed the size of the input transistor to W/L = 860 μm/0.2 μm. The shaping time is fixed by design at 1 us and, in this ASIC version, the feedback elements of the shaper are passive, which means that the area of the shaper can be reduced using active elements in future versions. Finally, the different gains of the CSA have been selected to maintain an ENC below 400 electrons for a detector capacitor of 20 pF, with a power consumption of 150 μ W per channel.
publishDate 2017
dc.date.none.fl_str_mv 2017
dc.type.none.fl_str_mv info:eu-repo/semantics/article
info:eu-repo/semantics/publishedVersion
format article
status_str publishedVersion
dc.identifier.none.fl_str_mv https://hdl.handle.net/2445/136698
url https://hdl.handle.net/2445/136698
dc.language.none.fl_str_mv Inglés
language_invalid_str_mv Inglés
dc.relation.none.fl_str_mv Reproducció del document publicat a: https://doi.org/10.1088/1748-0221/12/02/C02069
Journal of Instrumentation, 2017, vol. 12
https://doi.org/10.1088/1748-0221/12/02/C02069
info:eu-repo/grantAgreement/EC/H2020/737089
dc.rights.none.fl_str_mv cc-by (c) Alonso Casanovas, Oscar et al., 2017
http://creativecommons.org/licenses/by/3.0/es
info:eu-repo/semantics/openAccess
rights_invalid_str_mv cc-by (c) Alonso Casanovas, Oscar et al., 2017
http://creativecommons.org/licenses/by/3.0/es
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
dc.publisher.none.fl_str_mv Institute of Physics (IOP)
publisher.none.fl_str_mv Institute of Physics (IOP)
dc.source.none.fl_str_mv Articles publicats en revistes (Enginyeria Electrònica i Biomèdica)
reponame:Dipòsit Digital de la UB
instname:Universidad de Barcelona
instname_str Universidad de Barcelona
reponame_str Dipòsit Digital de la UB
collection Dipòsit Digital de la UB
repository.name.fl_str_mv
repository.mail.fl_str_mv
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