Power/performance/thermal design-space exploration for multicore architectures

Multicore architectures have been ruling the recent microprocessor design trend. This is due to different reasons: better performance, thread-level parallelism bounds in modern applications, ILP diminishing returns, better thermal/power scaling (many small cores dissipate less than a large and compl...

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Detalles Bibliográficos
Autores: Monchiero, Matteo, Canal Corretger, Ramon|||0000-0003-4542-204X, González Colás, Antonio María|||0000-0002-0009-0996
Tipo de recurso: artículo
Fecha de publicación:2008
País:España
Institución:Universitat Politècnica de Catalunya (UPC)
Repositorio:UPCommons. Portal del coneixement obert de la UPC
Idioma:inglés
OAI Identifier:oai:upcommons.upc.edu:2117/100831
Acceso en línea:https://hdl.handle.net/2117/100831
https://dx.doi.org/10.1109/TPDS.2007.70756
Access Level:acceso abierto
Palabra clave:Microprocessors
Chip multiprocessor
Design-space exploration
Thermal-aware microarchitectures
Power/performance
Microprocessadors
Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
Descripción
Sumario:Multicore architectures have been ruling the recent microprocessor design trend. This is due to different reasons: better performance, thread-level parallelism bounds in modern applications, ILP diminishing returns, better thermal/power scaling (many small cores dissipate less than a large and complex one), and the ease and reuse of design. This paper presents a thorough evaluation of multicore architectures. The architecture that we target is composed of a configurable number of cores, a memory hierarchy consisting of private L1, shared/private L2, and a shared bus interconnect. We consider a benchmark set composed of several parallel shared memory applications. We explore the design space related to the number of cores, L2 cache size, and processor complexity, showing the behavior of the different configurations/applications with respect to performance, energy consumption, and temperature. Design trade-offs are analyzed, stressing the interdependency of the metrics and design factors. In particular, we evaluate several chip floorplans. Their power/thermal characteristics are analyzed, showing the importance of considering thermal effects at the architectural level to achieve the best design choice.