Multicore architecture prototyping on reconfigurable devices
In the the last decades several performance walls were hit. The memory wall and the power wall are limiting the performance scaling of digital microprocessors. Homogeneous multicores rely on thread-level parallelism, which is challenging to exploit. New heterogeneous architectures promise higher per...
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| Tipo de recurso: | tesis doctoral |
| Estado: | Versión publicada |
| Fecha de publicación: | 2016 |
| País: | España |
| Institución: | CBUC, CESCA |
| Repositorio: | TDR. Tesis Doctorales en Red |
| OAI Identifier: | oai:www.tdx.cat:10803/393894 |
| Acceso en línea: | http://hdl.handle.net/10803/393894 https://dx.doi.org/10.5821/dissertation-2117-96324 |
| Access Level: | acceso abierto |
| Palabra clave: | Àrees temàtiques de la UPC::Informàtica 004 |
| Sumario: | In the the last decades several performance walls were hit. The memory wall and the power wall are limiting the performance scaling of digital microprocessors. Homogeneous multicores rely on thread-level parallelism, which is challenging to exploit. New heterogeneous architectures promise higher performance per watt rates, but software simulators have limited capacity to research them. In this thesis we investigate the advantages of Field-Programmable Gate Array devices (FPGA) for multicore research. We developed three prototypes, implementing up to 24 cores in a single FPGA, showing their superior performance and precision compared to software simulators. Moreover, our prototypes perform full-system emulation and are totally modifiable. We use our prototypes to implement novel architectural extensions such as Transactional Memory (TM). This use case allowed us to research different needs that computer architects may have, and how to implement them on FPGAs. We developed several techniques to offer profiling, debugging and verification techniques in each stage of the design process. These solutions may bridge the gap between FPGA-based hardware design and computer architects. In particular, we place a special stress on non-obtrusive techniques, so that the precision of the emulation is not affected. Based on the current trends and the sustained growth in the high-level synthesis community, we expect FPGAs to become an integral part of computer architecture design in the next years. |
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