A Hardware-Efficient and Reconfigurable UFMC Transmitter Architecture With its FPGA Prototype

[EN] Universal-filtered multicarrier (UFMC) is one of the potential candidates for 5G multicarrier waveforms due to its several attractive features such as suppressed out-of-band radiation to the nearby sub-band. However, the hardware realization of UFMC systems is limited by a large number of arith...

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Detalles Bibliográficos
Autores: Kumar, Vikas, Mukherjee, Mithun, Lloret, Jaime|||0000-0002-0862-0533
Tipo de recurso: artículo
Fecha de publicación:2020
País:España
Institución:Universitat Politècnica de València (UPV)
Repositorio:RiuNet. Repositorio Institucional de la Universitat Politécnica de Valéncia
Idioma:inglés
OAI Identifier:oai:riunet.upv.es:10251/189066
Acceso en línea:https://riunet.upv.es/handle/10251/189066
Access Level:acceso abierto
Palabra clave:5G
Coordinate-rotation-digital-computer (CORDIC)
Field-programmable gate array (FPGA)
Flexible architecture
Hardware implementation
Universal-filtered multicarrier (UFMC)
INGENIERIA TELEMATICA
Descripción
Sumario:[EN] Universal-filtered multicarrier (UFMC) is one of the potential candidates for 5G multicarrier waveforms due to its several attractive features such as suppressed out-of-band radiation to the nearby sub-band. However, the hardware realization of UFMC systems is limited by a large number of arithmetic units for inverse fast Fourier transform (IFFT) and pulse shaping filters. In this letter, we propose an architecture that presents a refreshing approach toward designing a low-complexity architecture for the baseband UFMC transmitter with Dolph-Chebyshev filter. Compared to the read-only-memory (ROM)-based state-of-the-art, the proposed architecture requires less number of ROM locations and has the flexibility to externally select the inverse discrete Fourier transform (IDFT)-size, number of sub-bands, and number of subcarriers in a sub-band. Moreover, we implement the proposed architecture on a commercially available Virtex-5 field-programmable gate array (FPGA) device for testing and analyzing the baseband UFMC signal. Finally, the XILINX post-route results are found comparable with MATLAB simulations.