Simple power-efficient preamplifier-shaper channel for readout interface of silicon detectors

This paper presents the design and characteristics of a front-end readout system for silicon sensors used in nuclear spectroscopy studies. Furthermore, the study proposes circuit topologies that combine gain-boosting and class-AB techniques featuring a good performance regarding gain, accuracy, spee...

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Autores: Sánchez Rodríguez, Trinidad, Gómez Galán, Juan Antonio, Hinojo Montero, José María, Sánchez Raya, Manuel, Muñoz Chavero, Fernando, González Carvajal, Ramón
Tipo de recurso: artículo
Fecha de publicación:2025
País:España
Institución:Universidad de Huelva (UHU)
Repositorio:Arias Montano. Repositorio Institucional de la Universidad de Huelva
Idioma:inglés
OAI Identifier:oai:ariasmontano.uhu.es:10272/24429
Acceso en línea:https://hdl.handle.net/10272/24429
Access Level:acceso abierto
Palabra clave:Amplifiers
Analog readout front-end
Class AB topology
CMOS integrated circuits
Gain-boosting
Nuclear spectroscopy
3307 Tecnología Electrónica
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spelling Simple power-efficient preamplifier-shaper channel for readout interface of silicon detectorsSánchez Rodríguez, TrinidadGómez Galán, Juan AntonioHinojo Montero, José MaríaSánchez Raya, ManuelMuñoz Chavero, FernandoGonzález Carvajal, RamónAmplifiersAnalog readout front-endClass AB topologyCMOS integrated circuitsGain-boostingNuclear spectroscopy3307 Tecnología ElectrónicaThis paper presents the design and characteristics of a front-end readout system for silicon sensors used in nuclear spectroscopy studies. Furthermore, the study proposes circuit topologies that combine gain-boosting and class-AB techniques featuring a good performance regarding gain, accuracy, speed, linearity, and power consumption, meeting the stringent requirements of deep submicrometer CMOS technologies. The readout channel comprises a charge-sensitive amplifier with a tunable discharge time, pole-zero cancellation circuit, and first-order unipolar shaper with a peaking time of 90 ns. The building blocks are made up of single-stage op-amps, thus not requiring compensation. Furthermore, the circuit is optimized for a detector capacitance of 5 pF, and the noise performance is discussed. Experimental results in a 180 nm CMOS process and a supply voltage of ±0.9 V validate the designed front-end channel. The total area of the chip obtained was 0.028 mm2. The conversion gain was 3.1 mV/fC, and the system maintained linearity up to an input charge range of 150 fC with a maximum output swing of 460 mV and recovered to the baseline within 400 ns. The compact design and the power consumption of only 1.97 mW provided a feasible solution for current radiation detectors coupled to many highly dense electronic channels.Elsevier20252025-01-0120252025-01-01journal articlehttp://purl.org/coar/resource_type/c_6501VoRhttp://purl.org/coar/version/c_970fb48d4fbd8a85info:eu-repo/semantics/articleapplication/pdfhttps://hdl.handle.net/10272/24429reponame:Arias Montano. Repositorio Institucional de la Universidad de Huelvainstname:Universidad de Huelva (UHU)Inglésengopen accesshttp://purl.org/coar/access_right/c_abf2Atribución-NoComercial-SinDerivadas 3.0 Españahttp://creativecommons.org/licenses/by-nc-nd/3.0/es/info:eu-repo/semantics/openAccessoai:ariasmontano.uhu.es:10272/244292026-06-02T14:58:11Z
dc.title.none.fl_str_mv Simple power-efficient preamplifier-shaper channel for readout interface of silicon detectors
title Simple power-efficient preamplifier-shaper channel for readout interface of silicon detectors
spellingShingle Simple power-efficient preamplifier-shaper channel for readout interface of silicon detectors
Sánchez Rodríguez, Trinidad
Amplifiers
Analog readout front-end
Class AB topology
CMOS integrated circuits
Gain-boosting
Nuclear spectroscopy
3307 Tecnología Electrónica
title_short Simple power-efficient preamplifier-shaper channel for readout interface of silicon detectors
title_full Simple power-efficient preamplifier-shaper channel for readout interface of silicon detectors
title_fullStr Simple power-efficient preamplifier-shaper channel for readout interface of silicon detectors
title_full_unstemmed Simple power-efficient preamplifier-shaper channel for readout interface of silicon detectors
title_sort Simple power-efficient preamplifier-shaper channel for readout interface of silicon detectors
dc.creator.none.fl_str_mv Sánchez Rodríguez, Trinidad
Gómez Galán, Juan Antonio
Hinojo Montero, José María
Sánchez Raya, Manuel
Muñoz Chavero, Fernando
González Carvajal, Ramón
author Sánchez Rodríguez, Trinidad
author_facet Sánchez Rodríguez, Trinidad
Gómez Galán, Juan Antonio
Hinojo Montero, José María
Sánchez Raya, Manuel
Muñoz Chavero, Fernando
González Carvajal, Ramón
author_role author
author2 Gómez Galán, Juan Antonio
Hinojo Montero, José María
Sánchez Raya, Manuel
Muñoz Chavero, Fernando
González Carvajal, Ramón
author2_role author
author
author
author
author
dc.contributor.none.fl_str_mv
dc.subject.none.fl_str_mv Amplifiers
Analog readout front-end
Class AB topology
CMOS integrated circuits
Gain-boosting
Nuclear spectroscopy
3307 Tecnología Electrónica
topic Amplifiers
Analog readout front-end
Class AB topology
CMOS integrated circuits
Gain-boosting
Nuclear spectroscopy
3307 Tecnología Electrónica
description This paper presents the design and characteristics of a front-end readout system for silicon sensors used in nuclear spectroscopy studies. Furthermore, the study proposes circuit topologies that combine gain-boosting and class-AB techniques featuring a good performance regarding gain, accuracy, speed, linearity, and power consumption, meeting the stringent requirements of deep submicrometer CMOS technologies. The readout channel comprises a charge-sensitive amplifier with a tunable discharge time, pole-zero cancellation circuit, and first-order unipolar shaper with a peaking time of 90 ns. The building blocks are made up of single-stage op-amps, thus not requiring compensation. Furthermore, the circuit is optimized for a detector capacitance of 5 pF, and the noise performance is discussed. Experimental results in a 180 nm CMOS process and a supply voltage of ±0.9 V validate the designed front-end channel. The total area of the chip obtained was 0.028 mm2. The conversion gain was 3.1 mV/fC, and the system maintained linearity up to an input charge range of 150 fC with a maximum output swing of 460 mV and recovered to the baseline within 400 ns. The compact design and the power consumption of only 1.97 mW provided a feasible solution for current radiation detectors coupled to many highly dense electronic channels.
publishDate 2025
dc.date.none.fl_str_mv 2025
2025-01-01
2025
2025-01-01
dc.type.none.fl_str_mv journal article
http://purl.org/coar/resource_type/c_6501
VoR
http://purl.org/coar/version/c_970fb48d4fbd8a85
dc.type.openaire.fl_str_mv info:eu-repo/semantics/article
format article
dc.identifier.none.fl_str_mv https://hdl.handle.net/10272/24429
url https://hdl.handle.net/10272/24429
dc.language.none.fl_str_mv Inglés
eng
language_invalid_str_mv Inglés
language eng
dc.rights.none.fl_str_mv open access
http://purl.org/coar/access_right/c_abf2
Atribución-NoComercial-SinDerivadas 3.0 España
http://creativecommons.org/licenses/by-nc-nd/3.0/es/
dc.rights.openaire.fl_str_mv info:eu-repo/semantics/openAccess
rights_invalid_str_mv open access
http://purl.org/coar/access_right/c_abf2
Atribución-NoComercial-SinDerivadas 3.0 España
http://creativecommons.org/licenses/by-nc-nd/3.0/es/
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
dc.publisher.none.fl_str_mv Elsevier
publisher.none.fl_str_mv Elsevier
dc.source.none.fl_str_mv reponame:Arias Montano. Repositorio Institucional de la Universidad de Huelva
instname:Universidad de Huelva (UHU)
instname_str Universidad de Huelva (UHU)
reponame_str Arias Montano. Repositorio Institucional de la Universidad de Huelva
collection Arias Montano. Repositorio Institucional de la Universidad de Huelva
repository.name.fl_str_mv
repository.mail.fl_str_mv
_version_ 1869413364647591937
score 15,811543

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