Power-optimal mapping of CNN applications to cloud-based Multi-FPGA platforms

Multi-FPGA platforms like Amazon Web Services F1 are perfect to accelerate multi-kernel pipelined applications, like Convolutional Neural Networks (CNNs). To reduce energy consumption, we propose to upload at runtime the best power-optimized CNN implementation for a given throughput constraint. Our...

Descripción completa

Detalles Bibliográficos
Autores: Shan, Junnan, Lazarescu, Mihai T., Cortadella, Jordi|||0000-0001-8114-250X, Lavagno, Luciano, Casu, Mario R.
Tipo de recurso: artículo
Fecha de publicación:2020
País:España
Institución:Universitat Politècnica de Catalunya (UPC)
Repositorio:UPCommons. Portal del coneixement obert de la UPC
Idioma:inglés
OAI Identifier:oai:upcommons.upc.edu:2117/340450
Acceso en línea:https://hdl.handle.net/2117/340450
https://dx.doi.org/10.1109/TCSII.2020.2998284
Access Level:acceso abierto
Palabra clave:Neural networks (Computer science)
Logic design
Field programmable gate arrays
CNN
Multi-FPGA
Power optimization
Xarxes neuronals (Informàtica)
Estructura lògica
Matrius de portes programables per l'usuari
Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
id ES_6e44c07ff180d5c3bbdabbee7b055e75
oai_identifier_str oai:upcommons.upc.edu:2117/340450
network_acronym_str ES
network_name_str España
repository_id_str
spelling Power-optimal mapping of CNN applications to cloud-based Multi-FPGA platformsShan, JunnanLazarescu, Mihai T.Cortadella, Jordi|||0000-0001-8114-250XLavagno, LucianoCasu, Mario R.Neural networks (Computer science)Logic designField programmable gate arraysCNNMulti-FPGAPower optimizationXarxes neuronals (Informàtica)Estructura lògicaMatrius de portes programables per l'usuariÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadorsMulti-FPGA platforms like Amazon Web Services F1 are perfect to accelerate multi-kernel pipelined applications, like Convolutional Neural Networks (CNNs). To reduce energy consumption, we propose to upload at runtime the best power-optimized CNN implementation for a given throughput constraint. Our design method gives the best number of parallel instances of each kernel, their allocation to the FPGAs, the number of powered-on FPGAs and their clock frequency. This is obtained by solving a mixed-integer, non-linear optimization problem that models power and performance of each component, as well as the duration of the computation phases-data transfer between a host CPU and the FPGA memory (typically DDR), data transfer between DDR and FPGA, and FPGA computation. The results show that the power saved compared to simply clock gating the fastest implementation is obviously very high, but it is also much more significant than simply scaling the frequency of the fastest implementation or replicating the slowest implementation on multiple FPGAs.This work was partially supported in part by the European Commission through the ECOSCALE Project under Grant H2020-ICT671632, in part by the Spanish Ministry for Economy and Competitiveness and the European Union (FEDER Funds) under Grant TIN2017-86727-C2-1- R and Grant FPI 2015, and in part by the Generalitat de Catalunya under Grant 2017 SGR 786.Peer Reviewed20202020-12-0120212021-02-24journal articlehttp://purl.org/coar/resource_type/c_6501AMhttp://purl.org/coar/version/c_ab4af688f83e57aainfo:eu-repo/semantics/articleapplication/pdfhttps://hdl.handle.net/2117/340450https://dx.doi.org/10.1109/TCSII.2020.2998284reponame:UPCommons. Portal del coneixement obert de la UPCinstname:Universitat Politècnica de Catalunya (UPC)InglésengAgencia Estatal de Investigación http://doi.org/10.13039/501100011033 Plan Estatal de Investigación Científica y Técnica y de Innovación 2013-2016 TIN2017-86727-C2-1-R MODELOS Y METODOS BASADOS EN GRAFOS PARA LA COMPUTACION EN GRAN ESCALAopen accesshttp://purl.org/coar/access_right/c_abf2info:eu-repo/semantics/openAccessoai:upcommons.upc.edu:2117/3404502026-05-27T15:37:01Z
dc.title.none.fl_str_mv Power-optimal mapping of CNN applications to cloud-based Multi-FPGA platforms
title Power-optimal mapping of CNN applications to cloud-based Multi-FPGA platforms
spellingShingle Power-optimal mapping of CNN applications to cloud-based Multi-FPGA platforms
Shan, Junnan
Neural networks (Computer science)
Logic design
Field programmable gate arrays
CNN
Multi-FPGA
Power optimization
Xarxes neuronals (Informàtica)
Estructura lògica
Matrius de portes programables per l'usuari
Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
title_short Power-optimal mapping of CNN applications to cloud-based Multi-FPGA platforms
title_full Power-optimal mapping of CNN applications to cloud-based Multi-FPGA platforms
title_fullStr Power-optimal mapping of CNN applications to cloud-based Multi-FPGA platforms
title_full_unstemmed Power-optimal mapping of CNN applications to cloud-based Multi-FPGA platforms
title_sort Power-optimal mapping of CNN applications to cloud-based Multi-FPGA platforms
dc.creator.none.fl_str_mv Shan, Junnan
Lazarescu, Mihai T.
Cortadella, Jordi|||0000-0001-8114-250X
Lavagno, Luciano
Casu, Mario R.
author Shan, Junnan
author_facet Shan, Junnan
Lazarescu, Mihai T.
Cortadella, Jordi|||0000-0001-8114-250X
Lavagno, Luciano
Casu, Mario R.
author_role author
author2 Lazarescu, Mihai T.
Cortadella, Jordi|||0000-0001-8114-250X
Lavagno, Luciano
Casu, Mario R.
author2_role author
author
author
author
dc.subject.none.fl_str_mv Neural networks (Computer science)
Logic design
Field programmable gate arrays
CNN
Multi-FPGA
Power optimization
Xarxes neuronals (Informàtica)
Estructura lògica
Matrius de portes programables per l'usuari
Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
topic Neural networks (Computer science)
Logic design
Field programmable gate arrays
CNN
Multi-FPGA
Power optimization
Xarxes neuronals (Informàtica)
Estructura lògica
Matrius de portes programables per l'usuari
Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
description Multi-FPGA platforms like Amazon Web Services F1 are perfect to accelerate multi-kernel pipelined applications, like Convolutional Neural Networks (CNNs). To reduce energy consumption, we propose to upload at runtime the best power-optimized CNN implementation for a given throughput constraint. Our design method gives the best number of parallel instances of each kernel, their allocation to the FPGAs, the number of powered-on FPGAs and their clock frequency. This is obtained by solving a mixed-integer, non-linear optimization problem that models power and performance of each component, as well as the duration of the computation phases-data transfer between a host CPU and the FPGA memory (typically DDR), data transfer between DDR and FPGA, and FPGA computation. The results show that the power saved compared to simply clock gating the fastest implementation is obviously very high, but it is also much more significant than simply scaling the frequency of the fastest implementation or replicating the slowest implementation on multiple FPGAs.
publishDate 2020
dc.date.none.fl_str_mv 2020
2020-12-01
2021
2021-02-24
dc.type.none.fl_str_mv journal article
http://purl.org/coar/resource_type/c_6501
AM
http://purl.org/coar/version/c_ab4af688f83e57aa
dc.type.openaire.fl_str_mv info:eu-repo/semantics/article
format article
dc.identifier.none.fl_str_mv https://hdl.handle.net/2117/340450
https://dx.doi.org/10.1109/TCSII.2020.2998284
url https://hdl.handle.net/2117/340450
https://dx.doi.org/10.1109/TCSII.2020.2998284
dc.language.none.fl_str_mv Inglés
eng
language_invalid_str_mv Inglés
language eng
dc.relation.none.fl_str_mv Agencia Estatal de Investigación http://doi.org/10.13039/501100011033 Plan Estatal de Investigación Científica y Técnica y de Innovación 2013-2016 TIN2017-86727-C2-1-R MODELOS Y METODOS BASADOS EN GRAFOS PARA LA COMPUTACION EN GRAN ESCALA
dc.rights.none.fl_str_mv open access
http://purl.org/coar/access_right/c_abf2
dc.rights.openaire.fl_str_mv info:eu-repo/semantics/openAccess
rights_invalid_str_mv open access
http://purl.org/coar/access_right/c_abf2
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
dc.source.none.fl_str_mv reponame:UPCommons. Portal del coneixement obert de la UPC
instname:Universitat Politècnica de Catalunya (UPC)
instname_str Universitat Politècnica de Catalunya (UPC)
reponame_str UPCommons. Portal del coneixement obert de la UPC
collection UPCommons. Portal del coneixement obert de la UPC
repository.name.fl_str_mv
repository.mail.fl_str_mv
_version_ 1869410412184731648
score 15,300719

Similares en LA Referencia