Hardware support for contention tracking in CPU and GPU last-level cache

Modern MPSoCs increasingly rely on resource utilization to improve application performance with different computation needs. The last-level cache (LLC) is one of the main shared resources, contributing to the improvement of aggregated performance. However, LLC sharing also increases individual appli...

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Detalhes bibliográficos
Autores: Barrera Herrera, Javier Enrique|||0000-0003-1469-2514, Kosmidis, Leonidas, Tabani, Hamid, Abella Ferrer, Jaume|||0000-0001-7951-4028, Cazorla Almeida, Francisco Javier
Formato: artículo
Fecha de publicación:2025
País:España
Recursos:Universitat Politècnica de Catalunya (UPC)
Repositorio:UPCommons. Portal del coneixement obert de la UPC
Idioma:inglés
OAI Identifier:oai:upcommons.upc.edu:2117/443379
Acesso em linha:https://hdl.handle.net/2117/443379
https://dx.doi.org/10.1016/j.sysarc.2025.103591
Access Level:acceso abierto
Palavra-chave:Last level cache
Resource sharing
Contention
Monitoring
Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
Àrees temàtiques de la UPC::Informàtica::Hardware
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oai_identifier_str oai:upcommons.upc.edu:2117/443379
network_acronym_str ES
network_name_str España
repository_id_str
spelling Hardware support for contention tracking in CPU and GPU last-level cacheBarrera Herrera, Javier Enrique|||0000-0003-1469-2514Kosmidis, LeonidasTabani, HamidAbella Ferrer, Jaume|||0000-0001-7951-4028Cazorla Almeida, Francisco JavierLast level cacheResource sharingContentionMonitoringÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadorsÀrees temàtiques de la UPC::Informàtica::HardwareModern MPSoCs increasingly rely on resource utilization to improve application performance with different computation needs. The last-level cache (LLC) is one of the main shared resources, contributing to the improvement of aggregated performance. However, LLC sharing also increases individual application performance variability, which is undesirable in scenarios where performance guarantees are required. While deploying cache partitioning mechanisms allows regaining predictability, they negatively affect aggregated performance. This confronts system designers with the dire conundrum of choosing between aggregated performance and predictability. We contend that adding hardware support to track contention among tasks (kernels) in the LLC enables it to be shared, removing shortcomings brought by partitioning while providing a clear view of how tasks (kernels) affect each other in the LLC of the CPUs and GPUs. This approach enables achieving the desired balance between performance and predictability. Thus, we propose a low-overhead hardware mechanism, called demotion counters (DC), that tightly estimates the contention tasks (kernels) generate on each other in the shared LLC, outperforming other solutions that build on existing hardware contention-tracking proposals which suffer an average workload breakdown deviation (wbd) over 0.13. Our results also show that DC introduces 0.66% area overhead.This work has been partially supported by the Spanish Ministry of Science, Innovation and Universities under grants PID2019-107255GBC21 and IJC-2020-045931-I funded by MCIN/AEI/10.13039/5011000 11033 and the European Research Council (ERC) under the European Union’s Horizon 2020 research and innovation programme (grant agreement No. 772773).Peer ReviewedElsevier20252025-12-0120252025-10-09journal articlehttp://purl.org/coar/resource_type/c_6501VoRhttp://purl.org/coar/version/c_970fb48d4fbd8a85info:eu-repo/semantics/articleapplication/pdfhttps://hdl.handle.net/2117/443379https://dx.doi.org/10.1016/j.sysarc.2025.103591reponame:UPCommons. Portal del coneixement obert de la UPCinstname:Universitat Politècnica de Catalunya (UPC)Inglésengopen accesshttp://purl.org/coar/access_right/c_abf2Attribution 4.0 Internationalhttp://creativecommons.org/licenses/by/4.0/info:eu-repo/semantics/openAccessoai:upcommons.upc.edu:2117/4433792026-05-27T15:37:01Z
dc.title.none.fl_str_mv Hardware support for contention tracking in CPU and GPU last-level cache
title Hardware support for contention tracking in CPU and GPU last-level cache
spellingShingle Hardware support for contention tracking in CPU and GPU last-level cache
Barrera Herrera, Javier Enrique|||0000-0003-1469-2514
Last level cache
Resource sharing
Contention
Monitoring
Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
Àrees temàtiques de la UPC::Informàtica::Hardware
title_short Hardware support for contention tracking in CPU and GPU last-level cache
title_full Hardware support for contention tracking in CPU and GPU last-level cache
title_fullStr Hardware support for contention tracking in CPU and GPU last-level cache
title_full_unstemmed Hardware support for contention tracking in CPU and GPU last-level cache
title_sort Hardware support for contention tracking in CPU and GPU last-level cache
dc.creator.none.fl_str_mv Barrera Herrera, Javier Enrique|||0000-0003-1469-2514
Kosmidis, Leonidas
Tabani, Hamid
Abella Ferrer, Jaume|||0000-0001-7951-4028
Cazorla Almeida, Francisco Javier
author Barrera Herrera, Javier Enrique|||0000-0003-1469-2514
author_facet Barrera Herrera, Javier Enrique|||0000-0003-1469-2514
Kosmidis, Leonidas
Tabani, Hamid
Abella Ferrer, Jaume|||0000-0001-7951-4028
Cazorla Almeida, Francisco Javier
author_role author
author2 Kosmidis, Leonidas
Tabani, Hamid
Abella Ferrer, Jaume|||0000-0001-7951-4028
Cazorla Almeida, Francisco Javier
author2_role author
author
author
author
dc.subject.none.fl_str_mv Last level cache
Resource sharing
Contention
Monitoring
Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
Àrees temàtiques de la UPC::Informàtica::Hardware
topic Last level cache
Resource sharing
Contention
Monitoring
Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
Àrees temàtiques de la UPC::Informàtica::Hardware
description Modern MPSoCs increasingly rely on resource utilization to improve application performance with different computation needs. The last-level cache (LLC) is one of the main shared resources, contributing to the improvement of aggregated performance. However, LLC sharing also increases individual application performance variability, which is undesirable in scenarios where performance guarantees are required. While deploying cache partitioning mechanisms allows regaining predictability, they negatively affect aggregated performance. This confronts system designers with the dire conundrum of choosing between aggregated performance and predictability. We contend that adding hardware support to track contention among tasks (kernels) in the LLC enables it to be shared, removing shortcomings brought by partitioning while providing a clear view of how tasks (kernels) affect each other in the LLC of the CPUs and GPUs. This approach enables achieving the desired balance between performance and predictability. Thus, we propose a low-overhead hardware mechanism, called demotion counters (DC), that tightly estimates the contention tasks (kernels) generate on each other in the shared LLC, outperforming other solutions that build on existing hardware contention-tracking proposals which suffer an average workload breakdown deviation (wbd) over 0.13. Our results also show that DC introduces 0.66% area overhead.
publishDate 2025
dc.date.none.fl_str_mv 2025
2025-12-01
2025
2025-10-09
dc.type.none.fl_str_mv journal article
http://purl.org/coar/resource_type/c_6501
VoR
http://purl.org/coar/version/c_970fb48d4fbd8a85
dc.type.openaire.fl_str_mv info:eu-repo/semantics/article
format article
dc.identifier.none.fl_str_mv https://hdl.handle.net/2117/443379
https://dx.doi.org/10.1016/j.sysarc.2025.103591
url https://hdl.handle.net/2117/443379
https://dx.doi.org/10.1016/j.sysarc.2025.103591
dc.language.none.fl_str_mv Inglés
eng
language_invalid_str_mv Inglés
language eng
dc.rights.none.fl_str_mv open access
http://purl.org/coar/access_right/c_abf2
Attribution 4.0 International
http://creativecommons.org/licenses/by/4.0/
dc.rights.openaire.fl_str_mv info:eu-repo/semantics/openAccess
rights_invalid_str_mv open access
http://purl.org/coar/access_right/c_abf2
Attribution 4.0 International
http://creativecommons.org/licenses/by/4.0/
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
dc.publisher.none.fl_str_mv Elsevier
publisher.none.fl_str_mv Elsevier
dc.source.none.fl_str_mv reponame:UPCommons. Portal del coneixement obert de la UPC
instname:Universitat Politècnica de Catalunya (UPC)
instname_str Universitat Politècnica de Catalunya (UPC)
reponame_str UPCommons. Portal del coneixement obert de la UPC
collection UPCommons. Portal del coneixement obert de la UPC
repository.name.fl_str_mv
repository.mail.fl_str_mv
_version_ 1869409102595096576
score 15.812429

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