SyRA: early system reliability analysis for cross-layer soft errors resilience in memory arrays of microprocessor systems

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Authors: Vallero, Alessandro, Savino, Alessandro, Chatzidimitriou, Athanansios, Kaliorakis, Manolis, Kooli, Maha, Riera Villanueva, Marc|||0000-0002-2768-5703, Di Natale, Giorgio, Bosio, Alberto, Canal Corretger, Ramon|||0000-0003-4542-204X, Gizopoulos, Dimitris, Di Carlo, Stefano, Anglada Sanchez , Martí, González Colás, Antonio María|||0000-0002-0009-0996, Mariani, R.
Format: article
Publication Date:2018
Country:España
Institution:Universitat Politècnica de Catalunya (UPC)
Repository:UPCommons. Portal del coneixement obert de la UPC
Language:English
OAI Identifier:oai:upcommons.upc.edu:2117/126429
Online Access:https://hdl.handle.net/2117/126429
https://dx.doi.org/10.1109/TC.2018.2887225
Access Level:Open access
Keyword:Microprocessors
Reliability
Cross-layer
Soft errors
Failures-in-Time
Microprocessadors
Àrees temàtiques de la UPC::Informàtica
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spelling SyRA: early system reliability analysis for cross-layer soft errors resilience in memory arrays of microprocessor systemsVallero, AlessandroSavino, AlessandroChatzidimitriou, AthanansiosKaliorakis, ManolisKooli, MahaRiera Villanueva, Marc|||0000-0002-2768-5703Di Natale, GiorgioBosio, AlbertoCanal Corretger, Ramon|||0000-0003-4542-204XGizopoulos, DimitrisDi Carlo, StefanoAnglada Sanchez , MartíGonzález Colás, Antonio María|||0000-0002-0009-0996Mariani, R.MicroprocessorsReliabilityCross-layerMicroprocessorsSoft errorsFailures-in-TimeMicroprocessadorsÀrees temàtiques de la UPC::Informàtica© 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.Cross-layer reliability is becoming the preferred solution when reliability is a concern in the design of a microprocessor-based system. Nevertheless, deciding how to distribute the error management across the different layers of the system is a very complex task that requires the support of dedicated frameworks for cross-layer reliability analysis. This paper proposes SyRA, a system-level cross-layer early reliability analysis framework for radiation induced soft errors in memory arrays of microprocessor-based systems. The framework exploits a multi-level hybrid Bayesian model to describe the target system and takes advantage of Bayesian inference to estimate different reliability metrics. SyRA implements several mechanisms and features to deal with the complexity of realistic models and implements a complete tool-chain that scales efficiently with the complexity of the system. The simulation time is significantly lower than micro-architecture level or RTL fault-injection experiments with an accuracy high enough to take effective design decisions. To demonstrate the capability of SyRA, we analyzed the reliability of a set of microprocessor-based systems characterized by different microprocessor architectures (i.e., Intel x86, ARM Cortex-A15, ARM Cortex-A9) running both the Linux operating system or bare metal. Each system under analysis executes different software workloads both from benchmark suites and from real applications.Peer ReviewedInstitute of Electrical and Electronics Engineers (IEEE)20182018-01-0120192019-01-09journal articlehttp://purl.org/coar/resource_type/c_6501AMhttp://purl.org/coar/version/c_ab4af688f83e57aainfo:eu-repo/semantics/articleapplication/pdfhttps://hdl.handle.net/2117/126429https://dx.doi.org/10.1109/TC.2018.2887225reponame:UPCommons. Portal del coneixement obert de la UPCinstname:Universitat Politècnica de Catalunya (UPC)InglésengEuropean Commission http://dx.doi.org/10.13039/100011102 Seventh Framework Programme 611404 Cross-Layer Early Reliability Evaluation for the Computing cOntinuumopen accesshttp://purl.org/coar/access_right/c_abf2info:eu-repo/semantics/openAccessoai:upcommons.upc.edu:2117/1264292026-05-27T15:37:01Z
dc.title.none.fl_str_mv SyRA: early system reliability analysis for cross-layer soft errors resilience in memory arrays of microprocessor systems
title SyRA: early system reliability analysis for cross-layer soft errors resilience in memory arrays of microprocessor systems
spellingShingle SyRA: early system reliability analysis for cross-layer soft errors resilience in memory arrays of microprocessor systems
Vallero, Alessandro
Microprocessors
Reliability
Cross-layer
Microprocessors
Soft errors
Failures-in-Time
Microprocessadors
Àrees temàtiques de la UPC::Informàtica
title_short SyRA: early system reliability analysis for cross-layer soft errors resilience in memory arrays of microprocessor systems
title_full SyRA: early system reliability analysis for cross-layer soft errors resilience in memory arrays of microprocessor systems
title_fullStr SyRA: early system reliability analysis for cross-layer soft errors resilience in memory arrays of microprocessor systems
title_full_unstemmed SyRA: early system reliability analysis for cross-layer soft errors resilience in memory arrays of microprocessor systems
title_sort SyRA: early system reliability analysis for cross-layer soft errors resilience in memory arrays of microprocessor systems
dc.creator.none.fl_str_mv Vallero, Alessandro
Savino, Alessandro
Chatzidimitriou, Athanansios
Kaliorakis, Manolis
Kooli, Maha
Riera Villanueva, Marc|||0000-0002-2768-5703
Di Natale, Giorgio
Bosio, Alberto
Canal Corretger, Ramon|||0000-0003-4542-204X
Gizopoulos, Dimitris
Di Carlo, Stefano
Anglada Sanchez , Martí
González Colás, Antonio María|||0000-0002-0009-0996
Mariani, R.
author Vallero, Alessandro
author_facet Vallero, Alessandro
Savino, Alessandro
Chatzidimitriou, Athanansios
Kaliorakis, Manolis
Kooli, Maha
Riera Villanueva, Marc|||0000-0002-2768-5703
Di Natale, Giorgio
Bosio, Alberto
Canal Corretger, Ramon|||0000-0003-4542-204X
Gizopoulos, Dimitris
Di Carlo, Stefano
Anglada Sanchez , Martí
González Colás, Antonio María|||0000-0002-0009-0996
Mariani, R.
author_role author
author2 Savino, Alessandro
Chatzidimitriou, Athanansios
Kaliorakis, Manolis
Kooli, Maha
Riera Villanueva, Marc|||0000-0002-2768-5703
Di Natale, Giorgio
Bosio, Alberto
Canal Corretger, Ramon|||0000-0003-4542-204X
Gizopoulos, Dimitris
Di Carlo, Stefano
Anglada Sanchez , Martí
González Colás, Antonio María|||0000-0002-0009-0996
Mariani, R.
author2_role author
author
author
author
author
author
author
author
author
author
author
author
author
dc.subject.none.fl_str_mv Microprocessors
Reliability
Cross-layer
Microprocessors
Soft errors
Failures-in-Time
Microprocessadors
Àrees temàtiques de la UPC::Informàtica
topic Microprocessors
Reliability
Cross-layer
Microprocessors
Soft errors
Failures-in-Time
Microprocessadors
Àrees temàtiques de la UPC::Informàtica
description © 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
publishDate 2018
dc.date.none.fl_str_mv 2018
2018-01-01
2019
2019-01-09
dc.type.none.fl_str_mv journal article
http://purl.org/coar/resource_type/c_6501
AM
http://purl.org/coar/version/c_ab4af688f83e57aa
dc.type.openaire.fl_str_mv info:eu-repo/semantics/article
format article
dc.identifier.none.fl_str_mv https://hdl.handle.net/2117/126429
https://dx.doi.org/10.1109/TC.2018.2887225
url https://hdl.handle.net/2117/126429
https://dx.doi.org/10.1109/TC.2018.2887225
dc.language.none.fl_str_mv Inglés
eng
language_invalid_str_mv Inglés
language eng
dc.relation.none.fl_str_mv European Commission http://dx.doi.org/10.13039/100011102 Seventh Framework Programme 611404 Cross-Layer Early Reliability Evaluation for the Computing cOntinuum
dc.rights.none.fl_str_mv open access
http://purl.org/coar/access_right/c_abf2
dc.rights.openaire.fl_str_mv info:eu-repo/semantics/openAccess
rights_invalid_str_mv open access
http://purl.org/coar/access_right/c_abf2
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
dc.publisher.none.fl_str_mv Institute of Electrical and Electronics Engineers (IEEE)
publisher.none.fl_str_mv Institute of Electrical and Electronics Engineers (IEEE)
dc.source.none.fl_str_mv reponame:UPCommons. Portal del coneixement obert de la UPC
instname:Universitat Politècnica de Catalunya (UPC)
instname_str Universitat Politècnica de Catalunya (UPC)
reponame_str UPCommons. Portal del coneixement obert de la UPC
collection UPCommons. Portal del coneixement obert de la UPC
repository.name.fl_str_mv
repository.mail.fl_str_mv
_version_ 1869408490842226688
score 15,301603

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