SyRA: early system reliability analysis for cross-layer soft errors resilience in memory arrays of microprocessor systems

© 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to se...

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Detalles Bibliográficos
Autores: Vallero, Alessandro, Savino, Alessandro, Chatzidimitriou, Athanansios, Kaliorakis, Manolis, Kooli, Maha, Riera Villanueva, Marc|||0000-0002-2768-5703, Di Natale, Giorgio, Bosio, Alberto, Canal Corretger, Ramon|||0000-0003-4542-204X, Gizopoulos, Dimitris, Di Carlo, Stefano, Anglada Sanchez , Martí, González Colás, Antonio María|||0000-0002-0009-0996, Mariani, R.
Tipo de recurso: artículo
Fecha de publicación:2018
País:España
Institución:Universitat Politècnica de Catalunya (UPC)
Repositorio:UPCommons. Portal del coneixement obert de la UPC
Idioma:inglés
OAI Identifier:oai:upcommons.upc.edu:2117/126429
Acceso en línea:https://hdl.handle.net/2117/126429
https://dx.doi.org/10.1109/TC.2018.2887225
Access Level:acceso abierto
Palabra clave:Microprocessors
Reliability
Cross-layer
Soft errors
Failures-in-Time
Microprocessadors
Àrees temàtiques de la UPC::Informàtica
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Sumario:© 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.

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