Efficient Hybrid Continuous-Time/Discrete-Time Cascade Modulators for Wideband Applications

This paper analyses the use of hybrid continuous-time/discrete-time cascade ΣΔ modulators for the implementation of power-efficient analog-to-digital converters in broadband wireless communication systems. Two alternative implementations of multi-rate cascade architectures are studied and compared w...

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Detalhes bibliográficos
Autores: García Sánchez, Gerardo, Rosa Utrera, José Manuel de la
Formato: artículo
Estado:Versión enviada para evaluación y publicación
Fecha de publicación:2014
País:España
Recursos:Universidad de Sevilla (US)
Repositorio:idUS. Depósito de Investigación de la Universidad de Sevilla
OAI Identifier:oai:idus.us.es:11441/74633
Acesso em linha:https://hdl.handle.net/11441/74633
https://doi.org/10.1016/j.mejo.2013.10.017
Access Level:acceso abierto
Palavra-chave:Analog-to-digital converters
Sigma-delta modulators
Hybrid continuous-time/discrete-time
Multi-rate signal processing
id ES_56c970e2a5ec985aa982c57f76c61de2
oai_identifier_str oai:idus.us.es:11441/74633
network_acronym_str ES
network_name_str España
repository_id_str
spelling Efficient Hybrid Continuous-Time/Discrete-Time Cascade Modulators for Wideband ApplicationsGarcía Sánchez, GerardoRosa Utrera, José Manuel de laAnalog-to-digital convertersSigma-delta modulatorsHybrid continuous-time/discrete-timeMulti-rate signal processingSigma-delta modulatorsThis paper analyses the use of hybrid continuous-time/discrete-time cascade ΣΔ modulators for the implementation of power-efficient analog-to-digital converters in broadband wireless communication systems. Two alternative implementations of multi-rate cascade architectures are studied and compared with conventional single-rate continuous-time topologies, taking into account the impact of main circuit-level error mechanisms, namely: mismatch, finite dc gain and gain-bandwidth product. In all cases, closed-form design equations are derived for the nonideal in-band noise power of all ΣΔ modulators under study, providing analytical relationships between their system-level performance and the corresponding circuit-level error parameters. Theoretical predictions match simulation results, showing that the lowest performance degradation is obtained by a new kind of multi-rate hybrid ΣΔ modulator, in which the front-end (continuous-time) stage operates at a higher rate than the back-end (discrete-time) stages. As a case study, the design of a hybrid GmC/switched-capacitor fourth-order (two-stage, 4-bit) cascade ΣΔ modulator is discussed to illustrate the potential benefits of the presented approachMinisterio de Economía y Competitividad TEC2010-14825/MICElsevierMinisterio de Economía y Competitividad (MINECO). España2014info:eu-repo/semantics/articleinfo:eu-repo/semantics/submittedVersionapplication/pdfapplication/pdfhttps://hdl.handle.net/11441/74633https://doi.org/10.1016/j.mejo.2013.10.017reponame:idUS. Depósito de Investigación de la Universidad de Sevillainstname:Universidad de Sevilla (US)InglésMicroelectronics Journal, 45 (10), 1234-1246.TEC2010-14825/MIChttp://dx.doi.org/10.1016/j.mejo.2013.10.017info:eu-repo/semantics/openAccessoai:idus.us.es:11441/746332026-06-17T12:51:07Z
dc.title.none.fl_str_mv Efficient Hybrid Continuous-Time/Discrete-Time Cascade Modulators for Wideband Applications
title Efficient Hybrid Continuous-Time/Discrete-Time Cascade Modulators for Wideband Applications
spellingShingle Efficient Hybrid Continuous-Time/Discrete-Time Cascade Modulators for Wideband Applications
García Sánchez, Gerardo
Analog-to-digital converters
Sigma-delta modulators
Hybrid continuous-time/discrete-time
Multi-rate signal processing
Sigma-delta modulators
title_short Efficient Hybrid Continuous-Time/Discrete-Time Cascade Modulators for Wideband Applications
title_full Efficient Hybrid Continuous-Time/Discrete-Time Cascade Modulators for Wideband Applications
title_fullStr Efficient Hybrid Continuous-Time/Discrete-Time Cascade Modulators for Wideband Applications
title_full_unstemmed Efficient Hybrid Continuous-Time/Discrete-Time Cascade Modulators for Wideband Applications
title_sort Efficient Hybrid Continuous-Time/Discrete-Time Cascade Modulators for Wideband Applications
dc.creator.none.fl_str_mv García Sánchez, Gerardo
Rosa Utrera, José Manuel de la
author García Sánchez, Gerardo
author_facet García Sánchez, Gerardo
Rosa Utrera, José Manuel de la
author_role author
author2 Rosa Utrera, José Manuel de la
author2_role author
dc.contributor.none.fl_str_mv Ministerio de Economía y Competitividad (MINECO). España
dc.subject.none.fl_str_mv Analog-to-digital converters
Sigma-delta modulators
Hybrid continuous-time/discrete-time
Multi-rate signal processing
Sigma-delta modulators
topic Analog-to-digital converters
Sigma-delta modulators
Hybrid continuous-time/discrete-time
Multi-rate signal processing
Sigma-delta modulators
description This paper analyses the use of hybrid continuous-time/discrete-time cascade ΣΔ modulators for the implementation of power-efficient analog-to-digital converters in broadband wireless communication systems. Two alternative implementations of multi-rate cascade architectures are studied and compared with conventional single-rate continuous-time topologies, taking into account the impact of main circuit-level error mechanisms, namely: mismatch, finite dc gain and gain-bandwidth product. In all cases, closed-form design equations are derived for the nonideal in-band noise power of all ΣΔ modulators under study, providing analytical relationships between their system-level performance and the corresponding circuit-level error parameters. Theoretical predictions match simulation results, showing that the lowest performance degradation is obtained by a new kind of multi-rate hybrid ΣΔ modulator, in which the front-end (continuous-time) stage operates at a higher rate than the back-end (discrete-time) stages. As a case study, the design of a hybrid GmC/switched-capacitor fourth-order (two-stage, 4-bit) cascade ΣΔ modulator is discussed to illustrate the potential benefits of the presented approach
publishDate 2014
dc.date.none.fl_str_mv 2014
dc.type.none.fl_str_mv info:eu-repo/semantics/article
info:eu-repo/semantics/submittedVersion
format article
status_str submittedVersion
dc.identifier.none.fl_str_mv https://hdl.handle.net/11441/74633
https://doi.org/10.1016/j.mejo.2013.10.017
url https://hdl.handle.net/11441/74633
https://doi.org/10.1016/j.mejo.2013.10.017
dc.language.none.fl_str_mv Inglés
language_invalid_str_mv Inglés
dc.relation.none.fl_str_mv Microelectronics Journal, 45 (10), 1234-1246.
TEC2010-14825/MIC
http://dx.doi.org/10.1016/j.mejo.2013.10.017
dc.rights.none.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
application/pdf
dc.publisher.none.fl_str_mv Elsevier
publisher.none.fl_str_mv Elsevier
dc.source.none.fl_str_mv reponame:idUS. Depósito de Investigación de la Universidad de Sevilla
instname:Universidad de Sevilla (US)
instname_str Universidad de Sevilla (US)
reponame_str idUS. Depósito de Investigación de la Universidad de Sevilla
collection idUS. Depósito de Investigación de la Universidad de Sevilla
repository.name.fl_str_mv
repository.mail.fl_str_mv
_version_ 1869408405051932672
score 15,300719

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