Design, implementation, and verification of an FPGA-based control system for a permanent-magnet motor drive built upon a three-phase four-level active-clamped inverter

At the present time, a DE0 board from Terasic/Altera, which includes a Field Programmable Gate Array (FPGA) Cyclone III, is used to control a three-phase four-level active-clamped inverter which drives a permanent-magnet motor. The project consists in designing a new FPGA-based control system that s...

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Autor: García Rojas, Gabriel|||0000-0003-2674-2769
Tipo de recurso: tesis de maestría
Fecha de publicación:2015
País:España
Institución:Universitat Politècnica de Catalunya (UPC)
Repositorio:UPCommons. Portal del coneixement obert de la UPC
Idioma:inglés
OAI Identifier:oai:upcommons.upc.edu:2099.1/26226
Acceso en línea:https://hdl.handle.net/2099.1/26226
Access Level:acceso abierto
Palabra clave:Analog-to-digital converters
Programmable logic devices
GREP
Multilevel
FPGA
Power
Converter
MAC
Convertidors continu-altern
Convertidors analògic/digitals
Dispositius lògics programables
Àrees temàtiques de la UPC::Enginyeria electrònica
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oai_identifier_str oai:upcommons.upc.edu:2099.1/26226
network_acronym_str ES
network_name_str España
repository_id_str
dc.title.none.fl_str_mv Design, implementation, and verification of an FPGA-based control system for a permanent-magnet motor drive built upon a three-phase four-level active-clamped inverter
title Design, implementation, and verification of an FPGA-based control system for a permanent-magnet motor drive built upon a three-phase four-level active-clamped inverter
spellingShingle Design, implementation, and verification of an FPGA-based control system for a permanent-magnet motor drive built upon a three-phase four-level active-clamped inverter
García Rojas, Gabriel|||0000-0003-2674-2769
Analog-to-digital converters
Programmable logic devices
GREP
Multilevel
FPGA
Power
Converter
MAC
Convertidors continu-altern
Convertidors analògic/digitals
Dispositius lògics programables
Àrees temàtiques de la UPC::Enginyeria electrònica
title_short Design, implementation, and verification of an FPGA-based control system for a permanent-magnet motor drive built upon a three-phase four-level active-clamped inverter
title_full Design, implementation, and verification of an FPGA-based control system for a permanent-magnet motor drive built upon a three-phase four-level active-clamped inverter
title_fullStr Design, implementation, and verification of an FPGA-based control system for a permanent-magnet motor drive built upon a three-phase four-level active-clamped inverter
title_full_unstemmed Design, implementation, and verification of an FPGA-based control system for a permanent-magnet motor drive built upon a three-phase four-level active-clamped inverter
title_sort Design, implementation, and verification of an FPGA-based control system for a permanent-magnet motor drive built upon a three-phase four-level active-clamped inverter
dc.creator.none.fl_str_mv García Rojas, Gabriel|||0000-0003-2674-2769
author García Rojas, Gabriel|||0000-0003-2674-2769
author_facet García Rojas, Gabriel|||0000-0003-2674-2769
author_role author
dc.contributor.none.fl_str_mv Lupón Roses, Emilio
dc.subject.none.fl_str_mv Analog-to-digital converters
Programmable logic devices
GREP
Multilevel
FPGA
Power
Converter
MAC
Convertidors continu-altern
Convertidors analògic/digitals
Dispositius lògics programables
Àrees temàtiques de la UPC::Enginyeria electrònica
topic Analog-to-digital converters
Programmable logic devices
GREP
Multilevel
FPGA
Power
Converter
MAC
Convertidors continu-altern
Convertidors analògic/digitals
Dispositius lògics programables
Àrees temàtiques de la UPC::Enginyeria electrònica
description At the present time, a DE0 board from Terasic/Altera, which includes a Field Programmable Gate Array (FPGA) Cyclone III, is used to control a three-phase four-level active-clamped inverter which drives a permanent-magnet motor. The project consists in designing a new FPGA-based control system that substitutes the current control system based on the DE0 board. The novel control system will consist of a single board containing a new FPGA more suitable for the specific application, the analog-to-digital converters, and all the necessary auxiliary circuitry. The FPGA content wi
publishDate 2015
dc.date.none.fl_str_mv 2015
2015-05-01
2015
2015-06-15
dc.type.none.fl_str_mv master thesis
http://purl.org/coar/resource_type/c_bdcc
NA
http://purl.org/coar/version/c_be7fb7dd8ff6fe43
dc.type.openaire.fl_str_mv info:eu-repo/semantics/masterThesis
format masterThesis
dc.identifier.none.fl_str_mv https://hdl.handle.net/2099.1/26226
url https://hdl.handle.net/2099.1/26226
dc.language.none.fl_str_mv Inglés
eng
language_invalid_str_mv Inglés
language eng
dc.rights.none.fl_str_mv open access
http://purl.org/coar/access_right/c_abf2
dc.rights.openaire.fl_str_mv info:eu-repo/semantics/openAccess
rights_invalid_str_mv open access
http://purl.org/coar/access_right/c_abf2
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
application/zip
dc.publisher.none.fl_str_mv Universitat Politècnica de Catalunya
publisher.none.fl_str_mv Universitat Politècnica de Catalunya
dc.source.none.fl_str_mv reponame:UPCommons. Portal del coneixement obert de la UPC
instname:Universitat Politècnica de Catalunya (UPC)
instname_str Universitat Politècnica de Catalunya (UPC)
reponame_str UPCommons. Portal del coneixement obert de la UPC
collection UPCommons. Portal del coneixement obert de la UPC
repository.name.fl_str_mv
repository.mail.fl_str_mv
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spelling Design, implementation, and verification of an FPGA-based control system for a permanent-magnet motor drive built upon a three-phase four-level active-clamped inverterGarcía Rojas, Gabriel|||0000-0003-2674-2769Analog-to-digital convertersProgrammable logic devicesGREPMultilevelFPGAPowerConverterMACConvertidors continu-alternConvertidors analògic/digitalsDispositius lògics programablesÀrees temàtiques de la UPC::Enginyeria electrònicaAt the present time, a DE0 board from Terasic/Altera, which includes a Field Programmable Gate Array (FPGA) Cyclone III, is used to control a three-phase four-level active-clamped inverter which drives a permanent-magnet motor. The project consists in designing a new FPGA-based control system that substitutes the current control system based on the DE0 board. The novel control system will consist of a single board containing a new FPGA more suitable for the specific application, the analog-to-digital converters, and all the necessary auxiliary circuitry. The FPGA content wi[ANGLÈS] The present work summarizes the work and knowledge acquired by the author during its Master’s Thesis in the Research Group in Power Electronics, GREP. The development is based on the Multilevel Active-Clamped (MAC) power converter prototype, which was initially developed by GREP. Serving as a great introduction to the multilevel converter state-of-the-art, the prototype was tested and it was proved the need for a custom FPGA-based control platform board to drive a PMSM. The design of the board is then performed following the requirements established by the research group and the results obtained from the initial tests. Issues as power decoupling, signal conditioning and grounding strategies are discussed in the following chapters.[CASTELLÀ] La memoria aquí presentada recoge el trabajo y el conocimiento adquirido por el autor durante la elaboración de su tesis de Máster dentro del Grupo de Investigación en Electrónica de Potencia de la Universidad Politécnica de Cataluña, GREP. El trabajo elaborado se desarrolla en torno al prototipo, previamente desarrollado por los miembros del GREP, de un convertidor de potencia multinivel de tipo MAC (Multilevel Active-Clamped). La familiarización con los últimos avances en conversores multinivel se lleva a cabo mediante la fase de pruebas experimentales con este dispositivo, que a su vez demuestran la necesidad de diseñar una placa controladora específica basada en FPGA para mover un motor de imanes permanentes. Esta placa de control se diseña siguiendo los requisitos establecidos por el GREP y las necesidades surgidas en la fase de experimentación. En los capítulos del trabajo se tratan temas como el desacoplo de la alimentación, acondicionamiento de señales o metodologías de diseño de planos de masa.[CATALÀ] La memòria aquí presentada recull el treball i el coneixement adquirit per l'autor durant l'elaboració de la seva tesi de Màster dins del Grup de Recerca en Electrònica de Potència de la Universitat Politècnica de Catalunya, GREP. El treball es desenvolupa en torn al prototipus, prèviament desenvolupat pels membres del GREP, d'un convertidor de potència multinivell de tipus MAC (Multilevel Active-Clamped). La familiarització amb els darrers avanços en convertidors multinivell s'ha dut a terme mitjançant la fase de proves experimentals amb aquest prototipus, les quals han demostrat la necessitat de dissenyar una placa controladora específica basada en FPGA per controlar un motor d'imants permanents. Aquesta placa de control s'ha dissenyat seguint els requisits establerts pel GREP i les necessitats aparegudes en la fase d'experimentació. En els capítols del treball es tracten temes com el desacoblament de l'alimentació, condicionament de senyals o metodologies de disseny de plans de massa.Universitat Politècnica de CatalunyaLupón Roses, Emilio20152015-05-0120152015-06-15master thesishttp://purl.org/coar/resource_type/c_bdccNAhttp://purl.org/coar/version/c_be7fb7dd8ff6fe43info:eu-repo/semantics/masterThesisapplication/pdfapplication/ziphttps://hdl.handle.net/2099.1/26226reponame:UPCommons. Portal del coneixement obert de la UPCinstname:Universitat Politècnica de Catalunya (UPC)Inglésengopen accesshttp://purl.org/coar/access_right/c_abf2info:eu-repo/semantics/openAccessoai:upcommons.upc.edu:2099.1/262262026-05-27T15:37:01Z
score 15,301629

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