Analysis and Modeling of the Non-Linear Sampling Process in Switched-Current Circuits - Application to Bandpass Sigma-Delta Modulators

This paper presents a precise model for the transient behaviour of Fully Differential (FD) SwItched-current (SI) memory cells placed at the front-end of high-speed A/D interfaces. This model allows us to analyze the main errors associated to the S/H process, namely: excess transfer-function delay an...

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Detalles Bibliográficos
Autores: Rosa, José M. de la, Pérez-Verdú, Belén, Medeiro, Fernando, Río, Rocío del, Rodríguez-Vázquez, Ángel
Tipo de recurso: artículo
Fecha de publicación:2001
País:España
Institución:Consejo Superior de Investigaciones Científicas (CSIC)
Repositorio:DIGITAL.CSIC. Repositorio Institucional del CSIC
OAI Identifier:oai:digital.csic.es:10261/3838
Acceso en línea:http://hdl.handle.net/10261/3838
Access Level:acceso abierto
Palabra clave:Switched-Current Circuits
Bandpass Sigma-Delta Modulators
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spelling Analysis and Modeling of the Non-Linear Sampling Process in Switched-Current Circuits - Application to Bandpass Sigma-Delta ModulatorsRosa, José M. de laPérez-Verdú, BelénMedeiro, FernandoRío, Rocío delRodríguez-Vázquez, ÁngelSwitched-Current CircuitsBandpass Sigma-Delta ModulatorsThis paper presents a precise model for the transient behaviour of Fully Differential (FD) SwItched-current (SI) memory cells placed at the front-end of high-speed A/D interfaces. This model allows us to analyze the main errors associated to the S/H process, namely: excess transfer-function delay and harmonic distortion. For the latter, the analysis is extended to BandPass ΣΔ Modulators (BP-ΣΔMs) and a closed-form expression is derived for the third-order intermodulation distortion. Time-domain simulations and experimental measurements taken from a 0.8μm CMOS 4th-order BP-ΣΔM silicon prototype validate our approach.Peer reviewedInstitute of Electrical and Electronics Engineers200820082001info:eu-repo/semantics/articlehttp://purl.org/coar/resource_type/c_6501185319 bytesapplication/pdfhttp://hdl.handle.net/10261/3838reponame:DIGITAL.CSIC. Repositorio Institucional del CSICinstname:Consejo Superior de Investigaciones Científicas (CSIC)Inglésinfo:eu-repo/semantics/openAccessoai:digital.csic.es:10261/38382026-05-22T06:33:51Z
dc.title.none.fl_str_mv Analysis and Modeling of the Non-Linear Sampling Process in Switched-Current Circuits - Application to Bandpass Sigma-Delta Modulators
title Analysis and Modeling of the Non-Linear Sampling Process in Switched-Current Circuits - Application to Bandpass Sigma-Delta Modulators
spellingShingle Analysis and Modeling of the Non-Linear Sampling Process in Switched-Current Circuits - Application to Bandpass Sigma-Delta Modulators
Rosa, José M. de la
Switched-Current Circuits
Bandpass Sigma-Delta Modulators
title_short Analysis and Modeling of the Non-Linear Sampling Process in Switched-Current Circuits - Application to Bandpass Sigma-Delta Modulators
title_full Analysis and Modeling of the Non-Linear Sampling Process in Switched-Current Circuits - Application to Bandpass Sigma-Delta Modulators
title_fullStr Analysis and Modeling of the Non-Linear Sampling Process in Switched-Current Circuits - Application to Bandpass Sigma-Delta Modulators
title_full_unstemmed Analysis and Modeling of the Non-Linear Sampling Process in Switched-Current Circuits - Application to Bandpass Sigma-Delta Modulators
title_sort Analysis and Modeling of the Non-Linear Sampling Process in Switched-Current Circuits - Application to Bandpass Sigma-Delta Modulators
dc.creator.none.fl_str_mv Rosa, José M. de la
Pérez-Verdú, Belén
Medeiro, Fernando
Río, Rocío del
Rodríguez-Vázquez, Ángel
author Rosa, José M. de la
author_facet Rosa, José M. de la
Pérez-Verdú, Belén
Medeiro, Fernando
Río, Rocío del
Rodríguez-Vázquez, Ángel
author_role author
author2 Pérez-Verdú, Belén
Medeiro, Fernando
Río, Rocío del
Rodríguez-Vázquez, Ángel
author2_role author
author
author
author
dc.subject.none.fl_str_mv Switched-Current Circuits
Bandpass Sigma-Delta Modulators
topic Switched-Current Circuits
Bandpass Sigma-Delta Modulators
description This paper presents a precise model for the transient behaviour of Fully Differential (FD) SwItched-current (SI) memory cells placed at the front-end of high-speed A/D interfaces. This model allows us to analyze the main errors associated to the S/H process, namely: excess transfer-function delay and harmonic distortion. For the latter, the analysis is extended to BandPass ΣΔ Modulators (BP-ΣΔMs) and a closed-form expression is derived for the third-order intermodulation distortion. Time-domain simulations and experimental measurements taken from a 0.8μm CMOS 4th-order BP-ΣΔM silicon prototype validate our approach.
publishDate 2001
dc.date.none.fl_str_mv 2001
2008
2008
dc.type.none.fl_str_mv info:eu-repo/semantics/article
http://purl.org/coar/resource_type/c_6501
format article
dc.identifier.none.fl_str_mv http://hdl.handle.net/10261/3838
url http://hdl.handle.net/10261/3838
dc.language.none.fl_str_mv Inglés
language_invalid_str_mv Inglés
dc.rights.none.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv 185319 bytes
application/pdf
dc.publisher.none.fl_str_mv Institute of Electrical and Electronics Engineers
publisher.none.fl_str_mv Institute of Electrical and Electronics Engineers
dc.source.none.fl_str_mv reponame:DIGITAL.CSIC. Repositorio Institucional del CSIC
instname:Consejo Superior de Investigaciones Científicas (CSIC)
instname_str Consejo Superior de Investigaciones Científicas (CSIC)
reponame_str DIGITAL.CSIC. Repositorio Institucional del CSIC
collection DIGITAL.CSIC. Repositorio Institucional del CSIC
repository.name.fl_str_mv
repository.mail.fl_str_mv
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score 15.81155

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