Analysis and Modeling of the Non-Linear Sampling Process in Switched-Current Circuits - Application to Bandpass Sigma-Delta Modulators
This paper presents a precise model for the transient behaviour of Fully Differential (FD) SwItched-current (SI) memory cells placed at the front-end of high-speed A/D interfaces. This model allows us to analyze the main errors associated to the S/H process, namely: excess transfer-function delay an...
| Autores: | , , , , |
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| Tipo de recurso: | artículo |
| Fecha de publicación: | 2001 |
| País: | España |
| Institución: | Consejo Superior de Investigaciones Científicas (CSIC) |
| Repositorio: | DIGITAL.CSIC. Repositorio Institucional del CSIC |
| OAI Identifier: | oai:digital.csic.es:10261/3838 |
| Acceso en línea: | http://hdl.handle.net/10261/3838 |
| Access Level: | acceso abierto |
| Palabra clave: | Switched-Current Circuits Bandpass Sigma-Delta Modulators |
| Sumario: | This paper presents a precise model for the transient behaviour of Fully Differential (FD) SwItched-current (SI) memory cells placed at the front-end of high-speed A/D interfaces. This model allows us to analyze the main errors associated to the S/H process, namely: excess transfer-function delay and harmonic distortion. For the latter, the analysis is extended to BandPass ΣΔ Modulators (BP-ΣΔMs) and a closed-form expression is derived for the third-order intermodulation distortion. Time-domain simulations and experimental measurements taken from a 0.8μm CMOS 4th-order BP-ΣΔM silicon prototype validate our approach. |
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