Compact CMOS active quenching/recharge circuit for SPAD arrays

Avalanche diodes operating in Geiger mode are able to detect single photon events. They can be employed to photon counting and time‐of‐flight estimation. In order to ensure proper operation of these devices, the avalanche current must be rapidly quenched, and, later on, the initial equilibrium must...

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Detalles Bibliográficos
Autores: Vornicu, Ion, Carmona-Galán, R., Pérez-Verdú, Belén, Rodríguez-Vázquez, Ángel
Tipo de recurso: artículo
Estado:Versión aceptada para publicación
Fecha de publicación:2016
País:España
Institución:Consejo Superior de Investigaciones Científicas (CSIC)
Repositorio:DIGITAL.CSIC. Repositorio Institucional del CSIC
OAI Identifier:oai:digital.csic.es:10261/195046
Acceso en línea:http://hdl.handle.net/10261/195046
Access Level:acceso abierto
Palabra clave:active quenching/recharge (AQR) circuit
tunable dead time
single‐photon avalanche diode (SPAD)
Geiger mode
Afterpulsing reduction
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spelling Compact CMOS active quenching/recharge circuit for SPAD arraysVornicu, IonCarmona-Galán, R.Pérez-Verdú, BelénRodríguez-Vázquez, Ángelactive quenching/recharge (AQR) circuittunable dead timesingle‐photon avalanche diode (SPAD)Geiger modeAfterpulsing reductionAvalanche diodes operating in Geiger mode are able to detect single photon events. They can be employed to photon counting and time‐of‐flight estimation. In order to ensure proper operation of these devices, the avalanche current must be rapidly quenched, and, later on, the initial equilibrium must be restored. In this paper, we present an active quenching/recharge circuit specially designed to be integrated in the form of an array of single‐photon avalanche diode (SPAD) detectors. Active quenching and recharge provide benefits like an accurately controllable pulse width and afterpulsing reduction. In addition, this circuit yields one of the lowest reported area occupations and power consumptions. The quenching mechanism employed is based on a positive feedback loop that accelerates quenching right after sensing the avalanche current. We have employed a current starved inverter for the regulation of the hold‐off time, which is more compact than other reported controllable delay implementations. This circuit has been fabricated in a standard 0.18 µm complementary metal‐oxide‐semiconductor (CMOS) technology. The SPAD has a quasi‐circular shape of 12 µm diameter active area. The fill factor is about 11%. The measured time resolution of the detector is 187 ps. The photon‐detection efficiency (PDE) at 540 nm wavelength is about 5% at an excess voltage of 900 mV. The break‐down voltage is 10.3 V. A dark count rate of 19 kHz is measured at room temperature. Worst case post‐layout simulations show a 117 ps quenching and 280 ps restoring times. The dead time can be accurately tuned from 5 to 500 ns. The pulse‐width jitter is below 1.8 ns when dead time is set to 40 ns.This work has been funded by the Spanish Government through projects TEC2012‐38921‐C02 MINECO (European Region Development Fund, ERDF/FEDER), IPT‐2011‐1625‐430000 MINECO and IPC‐20111009 CDTI (ERDF/FEDER), by Junta de Andalucía through project TIC 2338‐2013 CEICE and by the Office of Naval Research (USA) through grant N000141410355.Peer reviewedJohn Wiley & SonsEuropean CommissionMinisterio de Economía y Competitividad (España)Junta de AndalucíaOffice of Naval Research (US)Consejo Superior de Investigaciones Científicas [https://ror.org/02gfc7t72]201920192016info:eu-repo/semantics/articlehttp://purl.org/coar/resource_type/c_6501Postprintinfo:eu-repo/semantics/acceptedVersionhttp://hdl.handle.net/10261/195046reponame:DIGITAL.CSIC. Repositorio Institucional del CSICinstname:Consejo Superior de Investigaciones Científicas (CSIC)Ingléshttps://doi.org/10.1002/cta.2113Síinfo:eu-repo/semantics/openAccessoai:digital.csic.es:10261/1950462026-05-22T06:33:51Z
dc.title.none.fl_str_mv Compact CMOS active quenching/recharge circuit for SPAD arrays
title Compact CMOS active quenching/recharge circuit for SPAD arrays
spellingShingle Compact CMOS active quenching/recharge circuit for SPAD arrays
Vornicu, Ion
active quenching/recharge (AQR) circuit
tunable dead time
single‐photon avalanche diode (SPAD)
Geiger mode
Afterpulsing reduction
title_short Compact CMOS active quenching/recharge circuit for SPAD arrays
title_full Compact CMOS active quenching/recharge circuit for SPAD arrays
title_fullStr Compact CMOS active quenching/recharge circuit for SPAD arrays
title_full_unstemmed Compact CMOS active quenching/recharge circuit for SPAD arrays
title_sort Compact CMOS active quenching/recharge circuit for SPAD arrays
dc.creator.none.fl_str_mv Vornicu, Ion
Carmona-Galán, R.
Pérez-Verdú, Belén
Rodríguez-Vázquez, Ángel
author Vornicu, Ion
author_facet Vornicu, Ion
Carmona-Galán, R.
Pérez-Verdú, Belén
Rodríguez-Vázquez, Ángel
author_role author
author2 Carmona-Galán, R.
Pérez-Verdú, Belén
Rodríguez-Vázquez, Ángel
author2_role author
author
author
dc.contributor.none.fl_str_mv European Commission
Ministerio de Economía y Competitividad (España)
Junta de Andalucía
Office of Naval Research (US)
Consejo Superior de Investigaciones Científicas [https://ror.org/02gfc7t72]
dc.subject.none.fl_str_mv active quenching/recharge (AQR) circuit
tunable dead time
single‐photon avalanche diode (SPAD)
Geiger mode
Afterpulsing reduction
topic active quenching/recharge (AQR) circuit
tunable dead time
single‐photon avalanche diode (SPAD)
Geiger mode
Afterpulsing reduction
description Avalanche diodes operating in Geiger mode are able to detect single photon events. They can be employed to photon counting and time‐of‐flight estimation. In order to ensure proper operation of these devices, the avalanche current must be rapidly quenched, and, later on, the initial equilibrium must be restored. In this paper, we present an active quenching/recharge circuit specially designed to be integrated in the form of an array of single‐photon avalanche diode (SPAD) detectors. Active quenching and recharge provide benefits like an accurately controllable pulse width and afterpulsing reduction. In addition, this circuit yields one of the lowest reported area occupations and power consumptions. The quenching mechanism employed is based on a positive feedback loop that accelerates quenching right after sensing the avalanche current. We have employed a current starved inverter for the regulation of the hold‐off time, which is more compact than other reported controllable delay implementations. This circuit has been fabricated in a standard 0.18 µm complementary metal‐oxide‐semiconductor (CMOS) technology. The SPAD has a quasi‐circular shape of 12 µm diameter active area. The fill factor is about 11%. The measured time resolution of the detector is 187 ps. The photon‐detection efficiency (PDE) at 540 nm wavelength is about 5% at an excess voltage of 900 mV. The break‐down voltage is 10.3 V. A dark count rate of 19 kHz is measured at room temperature. Worst case post‐layout simulations show a 117 ps quenching and 280 ps restoring times. The dead time can be accurately tuned from 5 to 500 ns. The pulse‐width jitter is below 1.8 ns when dead time is set to 40 ns.
publishDate 2016
dc.date.none.fl_str_mv 2016
2019
2019
dc.type.none.fl_str_mv info:eu-repo/semantics/article
http://purl.org/coar/resource_type/c_6501
Postprint
info:eu-repo/semantics/acceptedVersion
format article
status_str acceptedVersion
dc.identifier.none.fl_str_mv http://hdl.handle.net/10261/195046
url http://hdl.handle.net/10261/195046
dc.language.none.fl_str_mv Inglés
language_invalid_str_mv Inglés
dc.relation.none.fl_str_mv https://doi.org/10.1002/cta.2113
Sí
dc.rights.none.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.publisher.none.fl_str_mv John Wiley & Sons
publisher.none.fl_str_mv John Wiley & Sons
dc.source.none.fl_str_mv reponame:DIGITAL.CSIC. Repositorio Institucional del CSIC
instname:Consejo Superior de Investigaciones Científicas (CSIC)
instname_str Consejo Superior de Investigaciones Científicas (CSIC)
reponame_str DIGITAL.CSIC. Repositorio Institucional del CSIC
collection DIGITAL.CSIC. Repositorio Institucional del CSIC
repository.name.fl_str_mv
repository.mail.fl_str_mv
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score 15.812429

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