Multiradix Trivium Implementations for Low-Power IoT Hardware

The integration of lightweight symmetric encryption is becoming increasingly widespread in very low-power Internet of Things applications, with the rapid emergence of very low energy block and stream ciphers in portable and wireless systems. Trivium is one of the lightweight stream ciphers shortlist...

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Detalles Bibliográficos
Autores: Mora-Gutiérrez, J. M., Jiménez Fernández, Carlos Jesús, Valencia-Barrero, M.
Tipo de recurso: artículo
Fecha de publicación:2017
País:España
Institución:Consejo Superior de Investigaciones Científicas (CSIC)
Repositorio:DIGITAL.CSIC. Repositorio Institucional del CSIC
OAI Identifier:oai:digital.csic.es:10261/195254
Acceso en línea:http://hdl.handle.net/10261/195254
Access Level:acceso abierto
Palabra clave:Application-specific integrated circuit (ASIC) implementation
Internet of Things (IoT) hardware
lightweight cryptography
low power
Stream ciphers
trivium
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spelling Multiradix Trivium Implementations for Low-Power IoT HardwareMora-Gutiérrez, J. M.Jiménez Fernández, Carlos JesúsValencia-Barrero, M.Application-specific integrated circuit (ASIC) implementationInternet of Things (IoT) hardwarelightweight cryptographylow powerStream cipherstriviumThe integration of lightweight symmetric encryption is becoming increasingly widespread in very low-power Internet of Things applications, with the rapid emergence of very low energy block and stream ciphers in portable and wireless systems. Trivium is one of the lightweight stream ciphers shortlisted for the hardware profile of the eSTREAM project. This paper describes low-power multiradix Trivium implementations based on the use of parallelization techniques to reduce dynamic power consumption. The low-power Trivium designs were implemented and characterized in TSMC 90 nm to compare area resources and power reduction. The implementation results show that our proposed designs offer dynamic power savings of 31%-45% with radix-1 and radix-2 when compared with the standard Trivium, and 15% with radix-8. There is no improvement, however, with radix-16.Peer reviewedInstitute of Electrical and Electronics EngineersConsejo Superior de Investigaciones Científicas [https://ror.org/02gfc7t72]201920192017info:eu-repo/semantics/articlehttp://purl.org/coar/resource_type/c_6501http://hdl.handle.net/10261/195254reponame:DIGITAL.CSIC. Repositorio Institucional del CSICinstname:Consejo Superior de Investigaciones Científicas (CSIC)Ingléshttps://doi.org/10.1109/TVLSI.2017.2736063Síinfo:eu-repo/semantics/openAccessoai:digital.csic.es:10261/1952542026-05-22T06:33:51Z
dc.title.none.fl_str_mv Multiradix Trivium Implementations for Low-Power IoT Hardware
title Multiradix Trivium Implementations for Low-Power IoT Hardware
spellingShingle Multiradix Trivium Implementations for Low-Power IoT Hardware
Mora-Gutiérrez, J. M.
Application-specific integrated circuit (ASIC) implementation
Internet of Things (IoT) hardware
lightweight cryptography
low power
Stream ciphers
trivium
title_short Multiradix Trivium Implementations for Low-Power IoT Hardware
title_full Multiradix Trivium Implementations for Low-Power IoT Hardware
title_fullStr Multiradix Trivium Implementations for Low-Power IoT Hardware
title_full_unstemmed Multiradix Trivium Implementations for Low-Power IoT Hardware
title_sort Multiradix Trivium Implementations for Low-Power IoT Hardware
dc.creator.none.fl_str_mv Mora-Gutiérrez, J. M.
Jiménez Fernández, Carlos Jesús
Valencia-Barrero, M.
author Mora-Gutiérrez, J. M.
author_facet Mora-Gutiérrez, J. M.
Jiménez Fernández, Carlos Jesús
Valencia-Barrero, M.
author_role author
author2 Jiménez Fernández, Carlos Jesús
Valencia-Barrero, M.
author2_role author
author
dc.contributor.none.fl_str_mv Consejo Superior de Investigaciones Científicas [https://ror.org/02gfc7t72]
dc.subject.none.fl_str_mv Application-specific integrated circuit (ASIC) implementation
Internet of Things (IoT) hardware
lightweight cryptography
low power
Stream ciphers
trivium
topic Application-specific integrated circuit (ASIC) implementation
Internet of Things (IoT) hardware
lightweight cryptography
low power
Stream ciphers
trivium
description The integration of lightweight symmetric encryption is becoming increasingly widespread in very low-power Internet of Things applications, with the rapid emergence of very low energy block and stream ciphers in portable and wireless systems. Trivium is one of the lightweight stream ciphers shortlisted for the hardware profile of the eSTREAM project. This paper describes low-power multiradix Trivium implementations based on the use of parallelization techniques to reduce dynamic power consumption. The low-power Trivium designs were implemented and characterized in TSMC 90 nm to compare area resources and power reduction. The implementation results show that our proposed designs offer dynamic power savings of 31%-45% with radix-1 and radix-2 when compared with the standard Trivium, and 15% with radix-8. There is no improvement, however, with radix-16.
publishDate 2017
dc.date.none.fl_str_mv 2017
2019
2019
dc.type.none.fl_str_mv info:eu-repo/semantics/article
http://purl.org/coar/resource_type/c_6501
format article
dc.identifier.none.fl_str_mv http://hdl.handle.net/10261/195254
url http://hdl.handle.net/10261/195254
dc.language.none.fl_str_mv Inglés
language_invalid_str_mv Inglés
dc.relation.none.fl_str_mv https://doi.org/10.1109/TVLSI.2017.2736063
Sí
dc.rights.none.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.publisher.none.fl_str_mv Institute of Electrical and Electronics Engineers
publisher.none.fl_str_mv Institute of Electrical and Electronics Engineers
dc.source.none.fl_str_mv reponame:DIGITAL.CSIC. Repositorio Institucional del CSIC
instname:Consejo Superior de Investigaciones Científicas (CSIC)
instname_str Consejo Superior de Investigaciones Científicas (CSIC)
reponame_str DIGITAL.CSIC. Repositorio Institucional del CSIC
collection DIGITAL.CSIC. Repositorio Institucional del CSIC
repository.name.fl_str_mv
repository.mail.fl_str_mv
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score 15,811543

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