Real-Time Inter-Frame Histogram Builder for SPAD Image Sensors
CMOS image sensors based on single-photon avalanche-diodes (SPAD) are suitable for 2D and 3D vision. Limited by uncorrelated noise and/or low illumination conditions, image capturing becomes nearly impossible in a single-shot exposure time. Moreover, the depth accuracy is affected by jitter. Therefo...
| Autores: | , , |
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| Formato: | artículo |
| Estado: | Versión aceptada para publicación |
| Fecha de publicación: | 2018 |
| País: | España |
| Recursos: | Universidad de Sevilla (US) |
| Repositorio: | idUS. Depósito de Investigación de la Universidad de Sevilla |
| OAI Identifier: | oai:idus.us.es:11441/88601 |
| Acesso em linha: | https://hdl.handle.net/11441/88601 https://doi.org/10.1109/JSEN.2017.2784484 |
| Access Level: | acceso abierto |
| Palavra-chave: | 2D/3D SPAD image sensor 2D/3D real-time inter-frame histogram builder In-pixel TDC Direct ToF |
| Resumo: | CMOS image sensors based on single-photon avalanche-diodes (SPAD) are suitable for 2D and 3D vision. Limited by uncorrelated noise and/or low illumination conditions, image capturing becomes nearly impossible in a single-shot exposure time. Moreover, the depth accuracy is affected by jitter. Therefore, many frames need to be taken to reconstruct the final accurate image. The proposed reconstruction algorithm is based on pixel-wise histogram building. Specifically, a histogram is built on the fly for each pixel of the array from the ongoing acquired frames. This paper presents the design and implementation on FPGA of a real-time pixel-wise inter-frame histogram builder at 1 kfps. The design has been proven with a 64 × 64-pixels SPAD camera. Its remarkable robustness has been demonstrated in harsh conditions, such as 42 kHz of dark count rate (DCR) and high background illumination up to 20 times larger than the DCR. The system has a graphic user interface for 2D/3D imager configuration, image streaming, and pixel-wise histogram streaming. |
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