Reliability and Makespan Optimization of Hardware Task Graphs in Partially Reconfigurable Platforms

This paper addresses the problem of reliability and makespan optimization of hardware task graphs in reconfigurable platforms by applying fault tolerance (FT) techniques to the running tasks based on the exploration of the Pareto set of solutions. In the presented solution, in contrast to the existi...

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Detalles Bibliográficos
Autores: Ramezani, Reza, Sedaghat, Yasser, Naghibzadeh, Mahmoud, Clemente, Juan Antonio
Tipo de recurso: artículo
Fecha de publicación:2017
País:España
Institución:Universidad Complutense de Madrid (UCM)
Repositorio:Docta Complutense
Idioma:inglés
OAI Identifier:oai:docta.ucm.es:20.500.14352/18074
Acceso en línea:https://hdl.handle.net/20.500.14352/18074
Access Level:acceso abierto
Palabra clave:Fault Tolerance
Optimization
Reconfigurable Platforms
Reliability
Scheduling
Física nuclear
Circuitos integrados
Hardware
Electrónica (Informática)
2207 Física Atómica y Nuclear
2203.07 Circuitos Integrados
2203 Electrónica
Descripción
Sumario:This paper addresses the problem of reliability and makespan optimization of hardware task graphs in reconfigurable platforms by applying fault tolerance (FT) techniques to the running tasks based on the exploration of the Pareto set of solutions. In the presented solution, in contrast to the existing approaches in the literature, task graph scheduling, tasks parallelism, reconfiguration delay, and FT requirements are taken into account altogether. This paper first presents a model for hardware task graphs, task prefetch and scheduling, reconfigurable computer, and a fault model for reliability. Then, a mathematical model of an integer nonlinear multi-objective optimization problem is presented for improving the FT of hardware task graphs, scheduled in partially reconfigurable platforms. Experimental results show the positive impacts of choosing the FT techniques selected by the proposed solution, which is named Pareto-based. Thus, in comparison to nonfault-tolerant designs or other state-of-the-art FT approaches, without increasing makespan, about 850% mean time to failure (MTTF) improvement is achieved and, without degrading reliability, makespan is improved by 25%. In addition, experiments in fault-varying environments have demonstrated that the presented approach outperforms the existing state-of-the-art adaptive FT techniques in terms of both MTTF and makespan.