Minimization of the Line Resistance Impact on Memdiode-Based Simulations of Multilayer Perceptron Arrays Applied to Pattern Recognition
In this paper, we extend the application of the Quasi-Static Memdiode model to the realistic SPICE simulation of memristor-based single (SLPs) and multilayer perceptrons (MLPs) intended for large dataset pattern recognition. By considering ex-situ training and the classification of the hand-written...
| Autores: | , , , , , |
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| Formato: | artículo |
| Fecha de publicación: | 2021 |
| País: | España |
| Recursos: | Universitat Autònoma de Barcelona |
| Repositorio: | Dipòsit Digital de Documents de la UAB |
| Idioma: | inglés |
| OAI Identifier: | oai:ddd.uab.cat:236698 |
| Acesso em linha: | https://ddd.uab.cat/record/236698 https://dx.doi.org/urn:doi:10.3390/jlpea11010009 |
| Access Level: | acceso abierto |
| Palavra-chave: | RRAM Resistive-switching Cross-point Memory Memristor Neuromorphic Pattern Recognition multilayer perceptron |
| Resumo: | In this paper, we extend the application of the Quasi-Static Memdiode model to the realistic SPICE simulation of memristor-based single (SLPs) and multilayer perceptrons (MLPs) intended for large dataset pattern recognition. By considering ex-situ training and the classification of the hand-written characters of the MNIST database, we evaluate the degradation of the inference accuracy due to the interconnection resistances for MLPs involving up to three hidden neural layers. Two approaches to reduce the impact of the line resistance are considered and implemented in our simulations, they are the inclusion of an iterative calibration algorithm and the partitioning of the synaptic layers into smaller blocks. The obtained results indicate that MLPs are more sensitive to the line resistance effect than SLPs and that partitioning is the most effective way to minimize the impact of high line resistance values. |
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