FPGA Implementation of a Linearization System for Wideband Envelope Tracking Power Amplifiers

This article focuses on the implementation of a linearization system for envelope tracking (ET) power amplifiers (PAs) in field-programmable gate array (FPGA). The ET PA linearization system includes a slew-rate reduction envelope generator, a RF leakage cancellation system in the supply envelope pa...

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Autores: Li W., Bartzoudis N., Fernández, JR, López-Bueno D., Montoro G., Gilabert P.L.
Tipo de recurso: artículo
Estado:Versión publicada
Fecha de publicación:2023
País:España
Institución:Centre Tecnològic de Telecomunicacions de Catalunya (CTTC)
Repositorio:r-CTTC. Repositorio Institucional Producción Científica del Centre Tecnològic de Telecomunicacions de Catalunya (CTTC)
OAI Identifier:oai:cttc.fundanetsuite.com:p7706
Acceso en línea:https://cttc.fundanetsuite.com/Publicaciones/ProdCientif/PublicacionFrw.aspx?id=7706
Access Level:acceso abierto
Palabra clave:Digital predistortion
envelope leakage cancellation (ELC)
envelope tracking (ET) power amplifier (PA)
field-programmable
gate array (FPGA)
high-level synthesis (HLS)
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spelling FPGA Implementation of a Linearization System for Wideband Envelope Tracking Power AmplifiersLi W.Bartzoudis N.Fernández, JRLópez-Bueno D.Montoro G.Gilabert P.L.Digital predistortionenvelope leakage cancellation (ELC)envelope tracking (ET) power amplifier (PA)field-programmablegate array (FPGA)high-level synthesis (HLS)This article focuses on the implementation of a linearization system for envelope tracking (ET) power amplifiers (PAs) in field-programmable gate array (FPGA). The ET PA linearization system includes a slew-rate reduction envelope generator, a RF leakage cancellation system in the supply envelope path and a baseband I-Q digital predistorter (DPD). This work targets the implementation of an ET PA linearization system on a radio frequency system-on-chip (RFSoC) device running under a demanding baseband sampling frequency of 614.4 MHz, which allows handling communication signals with up to 200 MHz bandwidth, considering a DPD bandwidth expansion by 3x. The detail of the FPGA implementation is presented to illustrate the trade-off between hardware resources and linearization performance, i.e., adjacent channel power ratio (ACPR) and error vector magnitude (EVM), under different bit configurations for the arithmetic. The power consumption is also evaluated since it is another relevant performance indicator to be considered in the FPGA implementation of the linearization system.Institute of Electrical and Electronics Engineers Inc.2023info:eu-repo/semantics/articleinfo:eu-repo/semantics/publishedVersionhttps://cttc.fundanetsuite.com/Publicaciones/ProdCientif/PublicacionFrw.aspx?id=7706IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUESISSN: 15579670ISSNe: 00189480reponame:r-CTTC. Repositorio Institucional Producción Científica del Centre Tecnològic de Telecomunicacions de Catalunya (CTTC)instname:Centre Tecnològic de Telecomunicacions de Catalunya (CTTC)Inglésinfo:eu-repo/semantics/openAccessoai:cttc.fundanetsuite.com:p77062026-06-17T11:44:47Z
dc.title.none.fl_str_mv FPGA Implementation of a Linearization System for Wideband Envelope Tracking Power Amplifiers
title FPGA Implementation of a Linearization System for Wideband Envelope Tracking Power Amplifiers
spellingShingle FPGA Implementation of a Linearization System for Wideband Envelope Tracking Power Amplifiers
Li W.
Digital predistortion
envelope leakage cancellation (ELC)
envelope tracking (ET) power amplifier (PA)
field-programmable
gate array (FPGA)
high-level synthesis (HLS)
title_short FPGA Implementation of a Linearization System for Wideband Envelope Tracking Power Amplifiers
title_full FPGA Implementation of a Linearization System for Wideband Envelope Tracking Power Amplifiers
title_fullStr FPGA Implementation of a Linearization System for Wideband Envelope Tracking Power Amplifiers
title_full_unstemmed FPGA Implementation of a Linearization System for Wideband Envelope Tracking Power Amplifiers
title_sort FPGA Implementation of a Linearization System for Wideband Envelope Tracking Power Amplifiers
dc.creator.none.fl_str_mv Li W.
Bartzoudis N.
Fernández, JR
López-Bueno D.
Montoro G.
Gilabert P.L.
author Li W.
author_facet Li W.
Bartzoudis N.
Fernández, JR
López-Bueno D.
Montoro G.
Gilabert P.L.
author_role author
author2 Bartzoudis N.
Fernández, JR
López-Bueno D.
Montoro G.
Gilabert P.L.
author2_role author
author
author
author
author
dc.subject.none.fl_str_mv Digital predistortion
envelope leakage cancellation (ELC)
envelope tracking (ET) power amplifier (PA)
field-programmable
gate array (FPGA)
high-level synthesis (HLS)
topic Digital predistortion
envelope leakage cancellation (ELC)
envelope tracking (ET) power amplifier (PA)
field-programmable
gate array (FPGA)
high-level synthesis (HLS)
description This article focuses on the implementation of a linearization system for envelope tracking (ET) power amplifiers (PAs) in field-programmable gate array (FPGA). The ET PA linearization system includes a slew-rate reduction envelope generator, a RF leakage cancellation system in the supply envelope path and a baseband I-Q digital predistorter (DPD). This work targets the implementation of an ET PA linearization system on a radio frequency system-on-chip (RFSoC) device running under a demanding baseband sampling frequency of 614.4 MHz, which allows handling communication signals with up to 200 MHz bandwidth, considering a DPD bandwidth expansion by 3x. The detail of the FPGA implementation is presented to illustrate the trade-off between hardware resources and linearization performance, i.e., adjacent channel power ratio (ACPR) and error vector magnitude (EVM), under different bit configurations for the arithmetic. The power consumption is also evaluated since it is another relevant performance indicator to be considered in the FPGA implementation of the linearization system.
publishDate 2023
dc.date.none.fl_str_mv 2023
dc.type.none.fl_str_mv info:eu-repo/semantics/article
info:eu-repo/semantics/publishedVersion
format article
status_str publishedVersion
dc.identifier.none.fl_str_mv https://cttc.fundanetsuite.com/Publicaciones/ProdCientif/PublicacionFrw.aspx?id=7706
url https://cttc.fundanetsuite.com/Publicaciones/ProdCientif/PublicacionFrw.aspx?id=7706
dc.language.none.fl_str_mv Inglés
language_invalid_str_mv Inglés
dc.rights.none.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.publisher.none.fl_str_mv Institute of Electrical and Electronics Engineers Inc.
publisher.none.fl_str_mv Institute of Electrical and Electronics Engineers Inc.
dc.source.none.fl_str_mv IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES
ISSN: 15579670
ISSNe: 00189480
reponame:r-CTTC. Repositorio Institucional Producción Científica del Centre Tecnològic de Telecomunicacions de Catalunya (CTTC)
instname:Centre Tecnològic de Telecomunicacions de Catalunya (CTTC)
instname_str Centre Tecnològic de Telecomunicacions de Catalunya (CTTC)
reponame_str r-CTTC. Repositorio Institucional Producción Científica del Centre Tecnològic de Telecomunicacions de Catalunya (CTTC)
collection r-CTTC. Repositorio Institucional Producción Científica del Centre Tecnològic de Telecomunicacions de Catalunya (CTTC)
repository.name.fl_str_mv
repository.mail.fl_str_mv
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score 15,811543

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