Random Dopant, Line-Edge Roughness, and Gate Workfunction Variability in a Nano InGaAs FinFET
A 3-D quantum-corrected drift-diffusion (DD) simulation study of three sources of statistical variability, including discrete random dopants (RDs), line-edge roughness (LER), and metal gate workfunction (MGW) was performed for a 14-nm gate length In0.53Ga0.47As FinFET in the subthreshold region usin...
| Autores: | , , , , , |
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| Tipo de recurso: | artículo |
| Fecha de publicación: | 2013 |
| País: | España |
| Institución: | Universidad de Santiago de Compostela (USC) |
| Repositorio: | Minerva. Repositorio Institucional de la Universidad de Santiago de Compostela |
| Idioma: | inglés |
| OAI Identifier: | oai:minerva.usc.gal:10347/38900 |
| Acceso en línea: | https://hdl.handle.net/10347/38900 |
| Access Level: | acceso abierto |
| Palabra clave: | III–V materials FinFETs Gate workfunction variability Intrinsic parameter fluctuations Line-edge roughness (LER) Random dopant (RD) 2203 Electrónica |
| Sumario: | A 3-D quantum-corrected drift-diffusion (DD) simulation study of three sources of statistical variability, including discrete random dopants (RDs), line-edge roughness (LER), and metal gate workfunction (MGW) was performed for a 14-nm gate length In0.53Ga0.47As FinFET in the subthreshold region using Fermi-Dirac statistics. This paper has been done at both low (0.05 V) and high drain biases (0.6 V). The LER variability is characterized by the root mean square amplitude (Δ) and correlation length (Λ), and the MGW variability by the metal grain size (GS). The RD-induced variation σ VT = 6 mV is similar to that observed in Si SoI FinFETs. The LER-induced threshold voltage variations (σ VT <; 6 mV) are similar to the RD variations when Δ = 1 nm, and smaller than the observed in Si SoI FinFETs (18 mV). For larger A, the LER exhibits σ VT ranging from 11 mV when Λ = 10 nm and Δ = 2 nm to 19 mV when Λ = 20 nm and Δ = 3 nm. The MGW variations are the dominant source of variability in the subthreshold characteristics, the σ VT ranges from 106 mV when GS = 10 nm to 43 mV when GS = 3 nm, which is larger than those observed in equivalent TiN metal-gate Si FinFETs. |
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