Reconfigurable Architecture of UFMC Transmitter for 5G and Its FPGA Prototype
[EN] A universal-filtered multicarrier (UFMC) system that is a generalization of filtered orthogonal frequency-division multiplexing (OFDM) and filter-bank-based multicarrier is being considered as a potential candidate for fifth-generation due to its robustness against intercarrier interference as...
| Autores: | , , |
|---|---|
| Tipo de recurso: | artículo |
| Fecha de publicación: | 2020 |
| País: | España |
| Institución: | Universitat Politècnica de València (UPV) |
| Repositorio: | RiuNet. Repositorio Institucional de la Universitat Politécnica de Valéncia |
| Idioma: | inglés |
| OAI Identifier: | oai:riunet.upv.es:10251/187689 |
| Acceso en línea: | https://riunet.upv.es/handle/10251/187689 |
| Access Level: | acceso abierto |
| Palabra clave: | Error analysis Pulse-shaping filters Reconfigurable architectures Universal-filtered multicarrier (UFMC) INGENIERIA TELEMATICA |
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Reconfigurable Architecture of UFMC Transmitter for 5G and Its FPGA PrototypeKumar, VikasMukherjee, MithunLloret, Jaime|||0000-0002-0862-0533Error analysisPulse-shaping filtersReconfigurable architecturesUniversal-filtered multicarrier (UFMC)INGENIERIA TELEMATICA[EN] A universal-filtered multicarrier (UFMC) system that is a generalization of filtered orthogonal frequency-division multiplexing (OFDM) and filter-bank-based multicarrier is being considered as a potential candidate for fifth-generation due to its robustness against intercarrier interference as in cyclic-prefix-based OFDM systems. However, real-time hardware realization of multicarrier systems is limited by a large number of arithmetic units for inverse fast Fourier transform and pulse-shaping filters. In this paper, we aim to propose a low-complexity and reconfigurable architecture for a baseband UFMC transmitter. To the best of our knowledge, the proposed architecture is the first reconfigurable architecture that has the flexibility to choose the number of subcarriers in a subband without any change in hardware resources. In addition, the proposed architecture selects the filter from a group of filters with a single selection line. Moreover, we use a commercially available field-programmable gate array device for real-time testing and analyzing the baseband UFMC signal. From the extensive experiments, we study the occupied bandwidth, main-lobe power, and sidelobe power of the baseband signal with different filters in real-time scenarios. Finally, we measure the quantization error in baseband signal generation for the proposed UFMC transmitter architecture and find comparable with the error bound.Institute of Electrical and Electronics EngineersDepartamento de ComunicacionesEscuela Politécnica Superior de GandiaRepositorio Institucional de la Universitat Politècnica de València Riunet20202020-03-01journal articlehttp://purl.org/coar/resource_type/c_6501VoRhttp://purl.org/coar/version/c_970fb48d4fbd8a85info:eu-repo/semantics/articleapplication/pdfapplication/pdfhttps://riunet.upv.es/handle/10251/187689reponame:RiuNet. Repositorio Institucional de la Universitat Politécnica de Valénciainstname:Universitat Politècnica de València (UPV)Inglésengopen accesshttp://purl.org/coar/access_right/c_abf2Reserva de todos los derechoshttp://rightsstatements.org/vocab/InC/1.0/info:eu-repo/semantics/openAccessoai:riunet.upv.es:10251/1876892026-06-13T07:49:27Z |
| dc.title.none.fl_str_mv |
Reconfigurable Architecture of UFMC Transmitter for 5G and Its FPGA Prototype |
| title |
Reconfigurable Architecture of UFMC Transmitter for 5G and Its FPGA Prototype |
| spellingShingle |
Reconfigurable Architecture of UFMC Transmitter for 5G and Its FPGA Prototype Kumar, Vikas Error analysis Pulse-shaping filters Reconfigurable architectures Universal-filtered multicarrier (UFMC) INGENIERIA TELEMATICA |
| title_short |
Reconfigurable Architecture of UFMC Transmitter for 5G and Its FPGA Prototype |
| title_full |
Reconfigurable Architecture of UFMC Transmitter for 5G and Its FPGA Prototype |
| title_fullStr |
Reconfigurable Architecture of UFMC Transmitter for 5G and Its FPGA Prototype |
| title_full_unstemmed |
Reconfigurable Architecture of UFMC Transmitter for 5G and Its FPGA Prototype |
| title_sort |
Reconfigurable Architecture of UFMC Transmitter for 5G and Its FPGA Prototype |
| dc.creator.none.fl_str_mv |
Kumar, Vikas Mukherjee, Mithun Lloret, Jaime|||0000-0002-0862-0533 |
| author |
Kumar, Vikas |
| author_facet |
Kumar, Vikas Mukherjee, Mithun Lloret, Jaime|||0000-0002-0862-0533 |
| author_role |
author |
| author2 |
Mukherjee, Mithun Lloret, Jaime|||0000-0002-0862-0533 |
| author2_role |
author author |
| dc.contributor.none.fl_str_mv |
Departamento de Comunicaciones Escuela Politécnica Superior de Gandia Repositorio Institucional de la Universitat Politècnica de València Riunet |
| dc.subject.none.fl_str_mv |
Error analysis Pulse-shaping filters Reconfigurable architectures Universal-filtered multicarrier (UFMC) INGENIERIA TELEMATICA |
| topic |
Error analysis Pulse-shaping filters Reconfigurable architectures Universal-filtered multicarrier (UFMC) INGENIERIA TELEMATICA |
| description |
[EN] A universal-filtered multicarrier (UFMC) system that is a generalization of filtered orthogonal frequency-division multiplexing (OFDM) and filter-bank-based multicarrier is being considered as a potential candidate for fifth-generation due to its robustness against intercarrier interference as in cyclic-prefix-based OFDM systems. However, real-time hardware realization of multicarrier systems is limited by a large number of arithmetic units for inverse fast Fourier transform and pulse-shaping filters. In this paper, we aim to propose a low-complexity and reconfigurable architecture for a baseband UFMC transmitter. To the best of our knowledge, the proposed architecture is the first reconfigurable architecture that has the flexibility to choose the number of subcarriers in a subband without any change in hardware resources. In addition, the proposed architecture selects the filter from a group of filters with a single selection line. Moreover, we use a commercially available field-programmable gate array device for real-time testing and analyzing the baseband UFMC signal. From the extensive experiments, we study the occupied bandwidth, main-lobe power, and sidelobe power of the baseband signal with different filters in real-time scenarios. Finally, we measure the quantization error in baseband signal generation for the proposed UFMC transmitter architecture and find comparable with the error bound. |
| publishDate |
2020 |
| dc.date.none.fl_str_mv |
2020 2020-03-01 |
| dc.type.none.fl_str_mv |
journal article http://purl.org/coar/resource_type/c_6501 VoR http://purl.org/coar/version/c_970fb48d4fbd8a85 |
| dc.type.openaire.fl_str_mv |
info:eu-repo/semantics/article |
| format |
article |
| dc.identifier.none.fl_str_mv |
https://riunet.upv.es/handle/10251/187689 |
| url |
https://riunet.upv.es/handle/10251/187689 |
| dc.language.none.fl_str_mv |
Inglés eng |
| language_invalid_str_mv |
Inglés |
| language |
eng |
| dc.rights.none.fl_str_mv |
open access http://purl.org/coar/access_right/c_abf2 Reserva de todos los derechos http://rightsstatements.org/vocab/InC/1.0/ |
| dc.rights.openaire.fl_str_mv |
info:eu-repo/semantics/openAccess |
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open access http://purl.org/coar/access_right/c_abf2 Reserva de todos los derechos http://rightsstatements.org/vocab/InC/1.0/ |
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openAccess |
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application/pdf application/pdf |
| dc.publisher.none.fl_str_mv |
Institute of Electrical and Electronics Engineers |
| publisher.none.fl_str_mv |
Institute of Electrical and Electronics Engineers |
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reponame:RiuNet. Repositorio Institucional de la Universitat Politécnica de Valéncia instname:Universitat Politècnica de València (UPV) |
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Universitat Politècnica de València (UPV) |
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RiuNet. Repositorio Institucional de la Universitat Politécnica de Valéncia |
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RiuNet. Repositorio Institucional de la Universitat Politécnica de Valéncia |
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