Experimental demonstration of a noise-tunable delay line with applications to phase synchronization
In this paper we propose and demonstrate a discrete circuit capable of generating arbitrary time delays dependent on noise, either added externally or already present in the signal of interest due to a finite signal-to-noise ratio. We then go on to demonstrate an application to phase locking of sign...
| Autores: | , , , , |
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| Tipo de recurso: | artículo |
| Estado: | Versión publicada |
| Fecha de publicación: | 2015 |
| País: | Argentina |
| Institución: | Consejo Nacional de Investigaciones Científicas y Técnicas |
| Repositorio: | CONICET Digital (CONICET) |
| Idioma: | inglés |
| OAI Identifier: | oai:ri.conicet.gov.ar:11336/111927 |
| Acceso en línea: | http://hdl.handle.net/11336/111927 |
| Access Level: | acceso abierto |
| Palabra clave: | PHASE-LOCKED LOOP DELAY LINE SYNCHRONIZATION STOCHASTIC RESONANCE NOISE https://purl.org/becyt/ford/2.2 https://purl.org/becyt/ford/2 |
| Sumario: | In this paper we propose and demonstrate a discrete circuit capable of generating arbitrary time delays dependent on noise, either added externally or already present in the signal of interest due to a finite signal-to-noise ratio. We then go on to demonstrate an application to phase locking of signals by means of a standard Phase-Locked Loop (PLL) design, where the usual Voltage-Controlled Oscillator (VCO) is replaced by the noise-tunable delay line. |
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