A simple circuit with dynamic logic architecture of basic logic gates

"We report experimental results obtained with a circuit possessing dynamic logic architecture based on one of the theoretical schemes proposed by H. Peng and collaborators in 2008. The schematic diagram of the electronic circuit and its implementation to get different basic logic gates are disp...

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Detalles Bibliográficos
Autores: ERIC CAMPOS CANTON, HARET CODRATIAN ROSU
Tipo de recurso: artículo
Estado:Versión enviada para evaluación y publicación
Fecha de publicación:2010
País:México
Institución:Instituto Potosino de Investigación Científica y Tecnológica
Repositorio:Repositorio Institucional del IPICYT
Idioma:inglés
OAI Identifier:oai:ipicyt.repositorioinstitucional.mx:1010/942
Acceso en línea:http://ipicyt.repositorioinstitucional.mx/jspui/handle/1010/942
Access Level:acceso abierto
Palabra clave:info:eu-repo/classification/Autor/Chaos computing
info:eu-repo/classification/Autor/Analog electronic
info:eu-repo/classification/Autor/Piecewise-linear functions
info:eu-repo/classification/cti/1
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network_name_str México
repository_id_str
spelling A simple circuit with dynamic logic architecture of basic logic gatesERIC CAMPOS CANTONHARET CODRATIAN ROSUinfo:eu-repo/classification/Autor/Chaos computinginfo:eu-repo/classification/Autor/Analog electronicinfo:eu-repo/classification/Autor/Piecewise-linear functionsinfo:eu-repo/classification/cti/1info:eu-repo/classification/cti/1"We report experimental results obtained with a circuit possessing dynamic logic architecture based on one of the theoretical schemes proposed by H. Peng and collaborators in 2008. The schematic diagram of the electronic circuit and its implementation to get different basic logic gates are displayed and discussed. In particular, we show explicitly how to get the electronic NOR, NAND and XOR gates. The proposed electronic circuit is easy to build because it employs only resistors, operational amplifiers and comparators."World Scientific Publishing Company2010info:eu-repo/semantics/articleinfo:eu-repo/semantics/submittedVersionapplication/pdfhttp://ipicyt.repositorioinstitucional.mx/jspui/handle/1010/942reponame:Repositorio Institucional del IPICYTinstname:Instituto Potosino de Investigación Científica y Tecnológicainstacron:IPICYTenginfo:eu-repo/semantics/altIdentifier/DOI/https://doi.org/10.1142/S0218127410027179citation:I. CAMPOS-CANTÓN et al, Int. J. Bifurcation Chaos 20, 2547 (2010).info:eu-repo/semantics/openAccesshttp://creativecommons.org/licenses/by-nc-nd/4.0oai:ipicyt.repositorioinstitucional.mx:1010/9422024-08-28T03:17:34Z
dc.title.none.fl_str_mv A simple circuit with dynamic logic architecture of basic logic gates
title A simple circuit with dynamic logic architecture of basic logic gates
spellingShingle A simple circuit with dynamic logic architecture of basic logic gates
ERIC CAMPOS CANTON
info:eu-repo/classification/Autor/Chaos computing
info:eu-repo/classification/Autor/Analog electronic
info:eu-repo/classification/Autor/Piecewise-linear functions
info:eu-repo/classification/cti/1
info:eu-repo/classification/cti/1
title_short A simple circuit with dynamic logic architecture of basic logic gates
title_full A simple circuit with dynamic logic architecture of basic logic gates
title_fullStr A simple circuit with dynamic logic architecture of basic logic gates
title_full_unstemmed A simple circuit with dynamic logic architecture of basic logic gates
title_sort A simple circuit with dynamic logic architecture of basic logic gates
dc.creator.none.fl_str_mv ERIC CAMPOS CANTON
HARET CODRATIAN ROSU
author ERIC CAMPOS CANTON
author_facet ERIC CAMPOS CANTON
HARET CODRATIAN ROSU
author_role author
author2 HARET CODRATIAN ROSU
author2_role author
dc.subject.none.fl_str_mv info:eu-repo/classification/Autor/Chaos computing
info:eu-repo/classification/Autor/Analog electronic
info:eu-repo/classification/Autor/Piecewise-linear functions
info:eu-repo/classification/cti/1
info:eu-repo/classification/cti/1
topic info:eu-repo/classification/Autor/Chaos computing
info:eu-repo/classification/Autor/Analog electronic
info:eu-repo/classification/Autor/Piecewise-linear functions
info:eu-repo/classification/cti/1
info:eu-repo/classification/cti/1
description "We report experimental results obtained with a circuit possessing dynamic logic architecture based on one of the theoretical schemes proposed by H. Peng and collaborators in 2008. The schematic diagram of the electronic circuit and its implementation to get different basic logic gates are displayed and discussed. In particular, we show explicitly how to get the electronic NOR, NAND and XOR gates. The proposed electronic circuit is easy to build because it employs only resistors, operational amplifiers and comparators."
publishDate 2010
dc.date.none.fl_str_mv 2010
dc.type.none.fl_str_mv info:eu-repo/semantics/article
info:eu-repo/semantics/submittedVersion
format article
status_str submittedVersion
dc.identifier.none.fl_str_mv http://ipicyt.repositorioinstitucional.mx/jspui/handle/1010/942
url http://ipicyt.repositorioinstitucional.mx/jspui/handle/1010/942
dc.language.none.fl_str_mv eng
language eng
dc.relation.none.fl_str_mv info:eu-repo/semantics/altIdentifier/DOI/https://doi.org/10.1142/S0218127410027179
citation:I. CAMPOS-CANTÓN et al, Int. J. Bifurcation Chaos 20, 2547 (2010).
dc.rights.none.fl_str_mv info:eu-repo/semantics/openAccess
http://creativecommons.org/licenses/by-nc-nd/4.0
eu_rights_str_mv openAccess
rights_invalid_str_mv http://creativecommons.org/licenses/by-nc-nd/4.0
dc.format.none.fl_str_mv application/pdf
dc.publisher.none.fl_str_mv World Scientific Publishing Company
publisher.none.fl_str_mv World Scientific Publishing Company
dc.source.none.fl_str_mv reponame:Repositorio Institucional del IPICYT
instname:Instituto Potosino de Investigación Científica y Tecnológica
instacron:IPICYT
instname_str Instituto Potosino de Investigación Científica y Tecnológica
instacron_str IPICYT
institution IPICYT
reponame_str Repositorio Institucional del IPICYT
collection Repositorio Institucional del IPICYT
repository.name.fl_str_mv
repository.mail.fl_str_mv
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score 15.811543

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