A Hybrid CMOS-Memristor Neuromorphic Synapse

Although data processing technology continues to advance at an astonishing rate, computers with brain-like processing capabilities still elude us. It is envisioned that such computers may be achieved by the fusion of neuroscience and nano-electronics to realize a brain-inspired platform. This paper...

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Authors: Azghadi, Mostafa, R., Linares Barranco, Bernabé, Abbott, Derek, Leong, Philip H.W.
Format: article
Status:Versión aceptada para publicación
Publication Date:2017
Country:España
Institution:Universidad de Sevilla (US)
Repository:idUS. Depósito de Investigación de la Universidad de Sevilla
OAI Identifier:oai:idus.us.es:11441/72478
Online Access:https://hdl.handle.net/11441/72478
https://doi.org/10.1109/TBCAS.2016.2618351
Access Level:Open access
Keyword:Synaptic Plasticity
Quadruplet
Triplet
STDP
Crossbar
Memristor
Neuromorphic
Learning
id ES_f65a2d5c99875c63ce07be80c4096a2e
oai_identifier_str oai:idus.us.es:11441/72478
network_acronym_str ES
network_name_str España
repository_id_str
spelling A Hybrid CMOS-Memristor Neuromorphic SynapseAzghadi, Mostafa, R.Linares Barranco, BernabéAbbott, DerekLeong, Philip H.W.Synaptic PlasticityQuadrupletTripletSTDPCrossbarMemristorNeuromorphicLearningAlthough data processing technology continues to advance at an astonishing rate, computers with brain-like processing capabilities still elude us. It is envisioned that such computers may be achieved by the fusion of neuroscience and nano-electronics to realize a brain-inspired platform. This paper proposes a high-performance nano-scale Complementary Metal Oxide Semiconductor (CMOS)-memristive circuit, which mimics a number of essential learning properties of biological synapses. The proposed synaptic circuit that is composed of memristors and CMOS transistors, alters its memristance in response to timing differences among its pre-and post-synaptic action potentials, giving rise to a family of Spike Timing Dependent Plasticity (STDP). The presented design advances preceding memristive synapse designs with regards to the ability to replicate essential behaviours characterised in a number of electrophysiological experiments performed in the animal brain, which involve higher order spike interactions. Furthermore, the proposed hybrid device CMOS area is estimated as 600μm in a 0.35μm process-this represents a factor of ten reduction in area with respect to prior CMOS art. The new design is integrated with silicon neurons in a crossbar array structure amenable to large-scale neuromorphic architectures and may pave the way for future neuromorphic systems with spike timing-dependent learning features. These systems are emerging for deployment in various applications ranging from basic neuroscience research, to pattern recognition, to Brain-Machine-Interfaces.Institute of Electrical and Electronics EngineersArquitectura y Tecnología de Computadores2017info:eu-repo/semantics/articleinfo:eu-repo/semantics/acceptedVersionapplication/pdfapplication/pdfhttps://hdl.handle.net/11441/72478https://doi.org/10.1109/TBCAS.2016.2618351reponame:idUS. Depósito de Investigación de la Universidad de Sevillainstname:Universidad de Sevilla (US)InglésIEEE Transactions on Biomedical Circuits and Systems, 11, 434-445.http://dx.doi.org/10.1109/TBCAS.2016.2618351info:eu-repo/semantics/openAccessoai:idus.us.es:11441/724782026-06-17T12:51:07Z
dc.title.none.fl_str_mv A Hybrid CMOS-Memristor Neuromorphic Synapse
title A Hybrid CMOS-Memristor Neuromorphic Synapse
spellingShingle A Hybrid CMOS-Memristor Neuromorphic Synapse
Azghadi, Mostafa, R.
Synaptic Plasticity
Quadruplet
Triplet
STDP
Crossbar
Memristor
Neuromorphic
Learning
title_short A Hybrid CMOS-Memristor Neuromorphic Synapse
title_full A Hybrid CMOS-Memristor Neuromorphic Synapse
title_fullStr A Hybrid CMOS-Memristor Neuromorphic Synapse
title_full_unstemmed A Hybrid CMOS-Memristor Neuromorphic Synapse
title_sort A Hybrid CMOS-Memristor Neuromorphic Synapse
dc.creator.none.fl_str_mv Azghadi, Mostafa, R.
Linares Barranco, Bernabé
Abbott, Derek
Leong, Philip H.W.
author Azghadi, Mostafa, R.
author_facet Azghadi, Mostafa, R.
Linares Barranco, Bernabé
Abbott, Derek
Leong, Philip H.W.
author_role author
author2 Linares Barranco, Bernabé
Abbott, Derek
Leong, Philip H.W.
author2_role author
author
author
dc.contributor.none.fl_str_mv Arquitectura y Tecnología de Computadores
dc.subject.none.fl_str_mv Synaptic Plasticity
Quadruplet
Triplet
STDP
Crossbar
Memristor
Neuromorphic
Learning
topic Synaptic Plasticity
Quadruplet
Triplet
STDP
Crossbar
Memristor
Neuromorphic
Learning
description Although data processing technology continues to advance at an astonishing rate, computers with brain-like processing capabilities still elude us. It is envisioned that such computers may be achieved by the fusion of neuroscience and nano-electronics to realize a brain-inspired platform. This paper proposes a high-performance nano-scale Complementary Metal Oxide Semiconductor (CMOS)-memristive circuit, which mimics a number of essential learning properties of biological synapses. The proposed synaptic circuit that is composed of memristors and CMOS transistors, alters its memristance in response to timing differences among its pre-and post-synaptic action potentials, giving rise to a family of Spike Timing Dependent Plasticity (STDP). The presented design advances preceding memristive synapse designs with regards to the ability to replicate essential behaviours characterised in a number of electrophysiological experiments performed in the animal brain, which involve higher order spike interactions. Furthermore, the proposed hybrid device CMOS area is estimated as 600μm in a 0.35μm process-this represents a factor of ten reduction in area with respect to prior CMOS art. The new design is integrated with silicon neurons in a crossbar array structure amenable to large-scale neuromorphic architectures and may pave the way for future neuromorphic systems with spike timing-dependent learning features. These systems are emerging for deployment in various applications ranging from basic neuroscience research, to pattern recognition, to Brain-Machine-Interfaces.
publishDate 2017
dc.date.none.fl_str_mv 2017
dc.type.none.fl_str_mv info:eu-repo/semantics/article
info:eu-repo/semantics/acceptedVersion
format article
status_str acceptedVersion
dc.identifier.none.fl_str_mv https://hdl.handle.net/11441/72478
https://doi.org/10.1109/TBCAS.2016.2618351
url https://hdl.handle.net/11441/72478
https://doi.org/10.1109/TBCAS.2016.2618351
dc.language.none.fl_str_mv Inglés
language_invalid_str_mv Inglés
dc.relation.none.fl_str_mv IEEE Transactions on Biomedical Circuits and Systems, 11, 434-445.
http://dx.doi.org/10.1109/TBCAS.2016.2618351
dc.rights.none.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
application/pdf
dc.publisher.none.fl_str_mv Institute of Electrical and Electronics Engineers
publisher.none.fl_str_mv Institute of Electrical and Electronics Engineers
dc.source.none.fl_str_mv reponame:idUS. Depósito de Investigación de la Universidad de Sevilla
instname:Universidad de Sevilla (US)
instname_str Universidad de Sevilla (US)
reponame_str idUS. Depósito de Investigación de la Universidad de Sevilla
collection idUS. Depósito de Investigación de la Universidad de Sevilla
repository.name.fl_str_mv
repository.mail.fl_str_mv
_version_ 1869424728575311872
score 15.301603

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