Lynx: An Efficient and Flexible Communication Schema for On-Chip and Off-Chip Applications in Distributed Static Industrial Networks
In this article, an efficient and flexible communication schema for on-chip and off-chip communication is presented. With a reduced header size, the proposal can achieve high communication efficiency among the devices of a distributed static network or the internal components in a system-on-chip. In...
| Autores: | , |
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| Formato: | artículo |
| Estado: | Versión publicada |
| Fecha de publicación: | 2024 |
| País: | España |
| Recursos: | Universidad de Sevilla (US) |
| Repositorio: | idUS. Depósito de Investigación de la Universidad de Sevilla |
| OAI Identifier: | oai:idus.us.es:11441/166923 |
| Acesso em linha: | https://hdl.handle.net/11441/166923 https://doi.org/10.1109/TII.2024.3422373 |
| Access Level: | acceso abierto |
| Palavra-chave: | Efficient communications FPGA indus- trial networks network on chip system on chip |
| Resumo: | In this article, an efficient and flexible communication schema for on-chip and off-chip communication is presented. With a reduced header size, the proposal can achieve high communication efficiency among the devices of a distributed static network or the internal components in a system-on-chip. In addition, the proposal is very versatile in terms of network configurations and topologies. An FPGA implementation of the proposal has been developed and thoroughly verified, both in simulation and when implemented in two different FPGA devices. The prototypes are exhibiting good results which validate the expected performance, with an efficient use of device resources. As a result, the proposed schema can both improve existing applications whose performance is affected by communication overhead and enable new industrial applications that require efficient communications in distributed static networks. |
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