Cita APA

Rodríguez Medina, A., Otero Marnotes, J. A., Platzner, M., & Torre Arnanz, E. d. l. (2022). Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs.

Citación estilo Chicago

Rodríguez Medina, Alfonso|||0000-0001-6326-743X, José Andrés|||0000-0003-4995-7009 Otero Marnotes, Marco|||0000-0002-6893-063X Platzner, y Eduardo de la|||0000-0001-5697-0573 Torre Arnanz. Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs. 2022.

Cita MLA

Rodríguez Medina, Alfonso|||0000-0001-6326-743X, José Andrés|||0000-0003-4995-7009 Otero Marnotes, Marco|||0000-0002-6893-063X Platzner, y Eduardo de la|||0000-0001-5697-0573 Torre Arnanz. Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs. 2022.