Contention-aware scheduling and resource management for emerging multicore architectures

Chip multicore processors (CMPs) currently constitute the architecture of choice for mosto general-pùrpose computing systems, and they will likely continue to be dominant in the near future. Advances in technology have enabled to pack an increasing number of cores and bigger caches on the same chip....

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Detalhes bibliográficos
Autor: García García, Adrián
Formato: tesis doctoral
Fecha de publicación:2022
País:España
Recursos:Universidad Complutense de Madrid (UCM)
Repositorio:Docta Complutense
Idioma:inglés
OAI Identifier:oai:docta.ucm.es:20.500.14352/3552
Acesso em linha:https://hdl.handle.net/20.500.14352/3552
Access Level:acceso abierto
Palavra-chave:004.4.032.24
004.272
004.421
Parallel processing (Electronic computer)
multiproccess
computer Algorithms
computer Software-development
Procesos paralelos
multiprocesadores
algoritmos computacionales
Software-desarrollo
Software
3304.16 Diseño Lógico
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repository_id_str
spelling Contention-aware scheduling and resource management for emerging multicore architecturesPlanificación consciente de la contención y gestión de recursos en arquitecturas multicore emergentesGarcía García, Adrián004.4.032.24004.272004.421Parallel processing (Electronic computer)multiproccesscomputer Algorithmscomputer Software-developmentProcesos paralelosmultiprocesadoresalgoritmos computacionalesSoftware-desarrolloSoftware3304.16 Diseño LógicoChip multicore processors (CMPs) currently constitute the architecture of choice for mosto general-pùrpose computing systems, and they will likely continue to be dominant in the near future. Advances in technology have enabled to pack an increasing number of cores and bigger caches on the same chip. Nevertheless, contention on shared resources on CMPs -present since the advent of these architectures- still poses a big challenge. Cores in a CMP typically share a last-level cache (LLC) and other memory-related resources with the remaining cores, such as a DRAM controller and an interconnection network. This causes that co-running applications may intensively compete with each other for these shared resources, leading to substantial and uneven performance degradation...Universidad Complutense de MadridPrieto Matías, ManuelSáez Alcaide, Juan CarlosUniversidad Complutense de Madrid20222022-03-2920222022-03-29doctoral thesishttp://purl.org/coar/resource_type/c_db06info:eu-repo/semantics/doctoralThesisapplication/pdfhttps://hdl.handle.net/20.500.14352/3552reponame:Docta Complutenseinstname:Universidad Complutense de Madrid (UCM)Inglésengopen accesshttp://purl.org/coar/access_right/c_abf2info:eu-repo/semantics/openAccessoai:docta.ucm.es:20.500.14352/35522026-06-02T12:44:21Z
dc.title.none.fl_str_mv Contention-aware scheduling and resource management for emerging multicore architectures
Planificación consciente de la contención y gestión de recursos en arquitecturas multicore emergentes
title Contention-aware scheduling and resource management for emerging multicore architectures
spellingShingle Contention-aware scheduling and resource management for emerging multicore architectures
García García, Adrián
004.4.032.24
004.272
004.421
Parallel processing (Electronic computer)
multiproccess
computer Algorithms
computer Software-development
Procesos paralelos
multiprocesadores
algoritmos computacionales
Software-desarrollo
Software
3304.16 Diseño Lógico
title_short Contention-aware scheduling and resource management for emerging multicore architectures
title_full Contention-aware scheduling and resource management for emerging multicore architectures
title_fullStr Contention-aware scheduling and resource management for emerging multicore architectures
title_full_unstemmed Contention-aware scheduling and resource management for emerging multicore architectures
title_sort Contention-aware scheduling and resource management for emerging multicore architectures
dc.creator.none.fl_str_mv García García, Adrián
author García García, Adrián
author_facet García García, Adrián
author_role author
dc.contributor.none.fl_str_mv Prieto Matías, Manuel
Sáez Alcaide, Juan Carlos
Universidad Complutense de Madrid
dc.subject.none.fl_str_mv 004.4.032.24
004.272
004.421
Parallel processing (Electronic computer)
multiproccess
computer Algorithms
computer Software-development
Procesos paralelos
multiprocesadores
algoritmos computacionales
Software-desarrollo
Software
3304.16 Diseño Lógico
topic 004.4.032.24
004.272
004.421
Parallel processing (Electronic computer)
multiproccess
computer Algorithms
computer Software-development
Procesos paralelos
multiprocesadores
algoritmos computacionales
Software-desarrollo
Software
3304.16 Diseño Lógico
description Chip multicore processors (CMPs) currently constitute the architecture of choice for mosto general-pùrpose computing systems, and they will likely continue to be dominant in the near future. Advances in technology have enabled to pack an increasing number of cores and bigger caches on the same chip. Nevertheless, contention on shared resources on CMPs -present since the advent of these architectures- still poses a big challenge. Cores in a CMP typically share a last-level cache (LLC) and other memory-related resources with the remaining cores, such as a DRAM controller and an interconnection network. This causes that co-running applications may intensively compete with each other for these shared resources, leading to substantial and uneven performance degradation...
publishDate 2022
dc.date.none.fl_str_mv 2022
2022-03-29
2022
2022-03-29
dc.type.none.fl_str_mv doctoral thesis
http://purl.org/coar/resource_type/c_db06
dc.type.openaire.fl_str_mv info:eu-repo/semantics/doctoralThesis
format doctoralThesis
dc.identifier.none.fl_str_mv https://hdl.handle.net/20.500.14352/3552
url https://hdl.handle.net/20.500.14352/3552
dc.language.none.fl_str_mv Inglés
eng
language_invalid_str_mv Inglés
language eng
dc.rights.none.fl_str_mv open access
http://purl.org/coar/access_right/c_abf2
dc.rights.openaire.fl_str_mv info:eu-repo/semantics/openAccess
rights_invalid_str_mv open access
http://purl.org/coar/access_right/c_abf2
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
dc.publisher.none.fl_str_mv Universidad Complutense de Madrid
publisher.none.fl_str_mv Universidad Complutense de Madrid
dc.source.none.fl_str_mv reponame:Docta Complutense
instname:Universidad Complutense de Madrid (UCM)
instname_str Universidad Complutense de Madrid (UCM)
reponame_str Docta Complutense
collection Docta Complutense
repository.name.fl_str_mv
repository.mail.fl_str_mv
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score 15.300719

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