Power Estimation Technique for DSP Architectures.

Bibliographic Details
Authors: Durrani, Yaseer A., Riesgo Alcaide, Teresa|||0000-0003-0532-8681
Format: article
Publication Date:2009
Country:España
Institution:Universidad Politécnica de Madrid
Repository:Archivo Digital UPM
OAI Identifier:oai:oa.upm.es:5087
Online Access:https://oa.upm.es/5087/
Access Level:Open access
Keyword:Macromodel
DSP architecture
Digital filter
Power estimation
Intellectual property
Monte Carlo simulation
Description
Description not available.